IP Library Granted Patent US 9,400,298
Granted Patent B1
US 9,400,298 · App. 13/342,942 · Granted Jul 26, 2016

Capacitive field sensor with sigma-delta modulator

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,400,298
App. No.
13/342,942
Granted
Jul 26, 2016
Kind
B1
Abstract

A capacitive sensor includes a switching capacitor circuit, a comparator, and a charge dissipation circuit. The switching capacitor circuit reciprocally couples a sensing capacitor in series with a modulation capacitor during a first switching phase and discharges the sensing capacitor during a second switching phase. The comparator is coupled to compare a voltage potential on the modulation capacitor to a reference and to generate a modulation signal in response. The charge dissipation circuit is coupled to the modulation capacitor to selectively discharge the modulation capacitor in response to the modulation signal.

Claims (38)

1. A capacitive sensor, comprising:

a switching capacitor circuit to reciprocally couple a sensing capacitor in series with a modulation capacitor during a first switching phase and to discharge the sensing capacitor during a second switching phase;

a comparator coupled to compare a voltage potential on the modulation capacitor to a reference and to generate a modulation signal in response; and

a charge dissipation circuit coupled to the modulation capacitor to selectively discharge the modulation capacitor in response to the modulation signal.

2. The capacitive sensor of claim 1 , wherein the switching capacitor circuit includes a diode coupled between the sensing capacitor and the modulation capacitor.

3. The capacitive sensor of claim 2 , wherein the diode is coupled to prevent the modulation capacitor from discharging during the second switching phase while the sensing capacitor is coupled to discharge.

4. The capacitive sensor of claim 2 , wherein the switching capacitor circuit further comprises:

a clock source;

an inverter coupled to the clock source; and

a switch coupled between a ground and a circuit node located between the sensing capacitor and the diode, wherein the switch is responsive to one of the inverter or the clock source, and wherein a first terminal of the sensing capacitor is coupled to an opposite one of the inverter or the clock source than the switch.

5. The capacitive sensor of claim 4 , wherein the switching capacitor circuit further comprises a resistor coupled between the sensing capacitor and the diode and wherein the circuit node is located between the resistor and the diode.

6. The capacitive sensor of claim 2 , wherein the switching capacitor circuit comprises:

a first switch coupled between a first terminal of the sensing capacitor and a first supply voltage;

a second switch coupled between the first terminal and a ground; and

a third switch coupled between a second terminal of the sensing capacitor and the ground.

7. The capacitive sensor of claim 6 , further comprising a control circuit coupled to control the first, second, and third switches, wherein the control circuit close circuits the first switch during the first switching phase and close circuits the second and third switches during the second switching phase.

8. The capacitive sensor of claim 1 , further comprising:

a latch coupled between the dissipation circuit and the comparator to latch the modulation signal to its output as a feedback signal fed back to the dissipation circuit; and

a measurement circuit coupled to measure a duty cycle of the feedback signal, wherein the duty cycle is indicative of a capacitance of the sensing capacitor.

9. The capacitive sensor of claim 1 , wherein the charge dissipation circuit comprises a current source coupled to selectively discharge the modulation capacitor in response to the modulation signal.

10. The capacitive sensor of claim 1 , wherein the charge dissipation circuit comprises:

a switching capacitor resistor circuit coupled between a terminal of the modulation capacitor and a ground; and

a clock source gated in response to the modulation signal and coupled to control the switching capacitor resistor circuit.

11. The capacitive sensor of claim 1 , wherein the charge dissipation circuit comprises: a switching capacitor resistor circuit coupled to the modulation capacitor and having two switches selectively coupled in series between the modulation capacitor and either a ground or the reference responsive to the modulation signal.

12. A system for implementing a user interface, comprising:

a switching capacitor circuit to reciprocally couple a field capacitor of the user interface in series with a modulation capacitor during a first switching phase and to discharge the field capacitor during a second switching phase;

a modulation circuit coupled to compare a voltage potential on the modulation capacitor to a reference and to generate a feedback signal to control selective discharge of the modulation capacitor; and

a measurement circuit coupled to measure a duty cycle of the feedback signal.

13. The system of claim 12 , further comprising logic coupled to determine whether a user interaction with the field capacitor occurred based upon the duty cycle measured by the measurement circuit.

14. The system of claim 12 , further comprising a diode coupled between the field capacitor and the modulation capacitor, the diode oriented to prevent discharge of the modulation capacitor during the second switching phase.

15. The system of claim 14 , wherein the switching capacitor circuit comprises:

a clock source;

an inverter coupled to the clock source; and

a switch coupled between a ground and a circuit node, wherein the circuit node is located between the field capacitor and the diode, wherein the switch is coupled to be responsive to one of the inverter or the clock source, and wherein the field capacitor is coupled to an opposite one of the inverter or the clock source than the switch.

16. The system of claim 15 , wherein the field capacitor and the modulation capacitor are externally coupled to an integrated circuit including the clock source, the modulation circuit, and the measurement circuit.

17. The system of claim 16 , further comprising:

an input/output (“I/O”) pin of the integrated circuit through which the field sensor is coupled; and

a plurality of field sensors coupled to the I/O pin to timeshare the modulation circuit and the clock circuit.

Assignments (7)
MERGER Recorded Nov 14, 2025
From: CYPRESS SEMICONDUCTOR CORPORATION
To: INFINEON TECHNOLOGIES AMERICAS CORP.
Reel/Frame 073571/0456 →
RELEASE OF SECURITY INTEREST Recorded Mar 16, 2022
From: MUFG UNION BANK, N.A.
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 059410/0438 →
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Oct 28, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MUFG UNION BANK, N.A.
Reel/Frame 050896/0366 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 4, 2014
From: KREMIN, VIKTOR; RYSHTUN, ANDRIY
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 032130/0603 →
PATENT SECURITY AGREEMENT Recorded Aug 28, 2012
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 028863/0870 →