IP Library Granted Patent US 8,704,311
Granted Patent B2
US 8,704,311 · App. 13/343,078 · Granted Apr 22, 2014

Semiconductor device having epitaxial semiconductor layer above impurity layer

Inventors: Kazushi Fujita (Yokohama, JP); Taiji Ema (Yokohama, JP); Hiroyuki Ogawa (Yokohama, JP)
Assignee: Fujitsu Semiconductor Limited
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Quick Facts
Patent No.
US 8,704,311
App. No.
13/343,078
Granted
Apr 22, 2014
Kind
B2
Abstract

The semiconductor device includes a first transistor including a first impurity layer of a first conductivity type formed in a first region of a semiconductor substrate, a first epitaxial semiconductor layer formed above the first impurity layer, a first gate insulating film formed above the first epitaxial semiconductor layer, and a first gate electrode formed above the first gate insulating film, and a second transistor including a second impurity layer of the second conductivity type formed in a second region of the semiconductor substrate, a second epitaxial semiconductor layer formed above the second impurity layer and having a thickness different from that of the first epitaxial semiconductor layer, a second gate insulating film formed above the second epitaxial semiconductor layer and having a film thickness equal to that of the first gate insulating film and a second gate electrode formed above the second gate insulating film.

Claims (67)

1. A semiconductor device comprising:

a first transistor including:

a first impurity layer of a first conductivity type formed in a first region of a semiconductor substrate;

a first epitaxial semiconductor layer formed above the first impurity layer;

a first gate insulating film formed above the first epitaxial semiconductor layer;

a first gate electrode formed above the first gate insulating film; and

first source/drain regions of a second conductivity type opposite to the first conductivity type formed in the first epitaxial semiconductor layer and the semiconductor substrate in the first region, the first impurity layer being located between the first source/drain regions; and

a second transistor including:

a second impurity layer of the second conductivity type formed in a second region of the semiconductor substrate;

a second epitaxial semiconductor layer formed above the second impurity layer and having a film thickness different from a film thickness of the first epitaxial semiconductor layer;

a second gate insulating film formed above the second epitaxial semiconductor layer;

a second gate electrode formed above the second gate insulating film; and

second source/drain regions of the first conductivity type formed in the second epitaxial semiconductor layer and the semiconductor substrate in the second region, the second impurity layer being located between the second source/drain regions, wherein

the film thickness of the first epitaxial semiconductor layer is larger than the film thickness of the second epitaxial semiconductor layer, and

a diffusion velocity of an impurity which forms the first impurity layer is higher than a diffusion velocity of an impurity which forms the second impurity layer.

2. The semiconductor device according to claim 1 , wherein

the second impurity layer contains boron and carbon.

3. The semiconductor device according to claim 2 , wherein

the first impurity layer contains arsenic.

4. The semiconductor device according to claim 1 , wherein

the first impurity layer contains boron and carbon.

5. The semiconductor device according to claim 4 , wherein

the second impurity layer contains antimony.

6. The semiconductor device according to claim 1 , wherein

a height of a surface of the first epitaxial semiconductor layer is equal to a height of a surface of the second epitaxial semiconductor layer.

7. The semiconductor device according to claim 1 , further comprising:

a first well formed in the first region of the semiconductor substrate and under the first impurity layer; and a second well formed in the first region of the semiconductor substrate and under the second impurity layer.

8. The semiconductor device according to claim 1 , wherein

a thickness of the first gate insulating film is equal to a thickness of the second gate insulating film.

9. A semiconductor device comprising:

a first transistor including:

a first impurity layer of a first conductivity type formed in a first region of a semiconductor substrate;

a first epitaxial semiconductor layer formed above the first impurity layer;

a first gate insulating film formed above the first epitaxial semiconductor layer;

a first gate electrode formed above the first gate insulating film; and

first source/drain regions of a second conductivity type opposite to the first conductivity type formed in the first epitaxial semiconductor layer and the semiconductor substrate in the first region, the first impurity layer being located between the first source/drain regions;

a second transistor including:

a second impurity layer of the second conductivity type formed in a second region of the semiconductor substrate;

a second epitaxial semiconductor layer formed above the second impurity layer and having a film thickness different from a film thickness of the first epitaxial semiconductor layer;

a second gate insulating film formed above the second epitaxial semiconductor layer;

a second gate electrode formed above the second gate insulating film; and

second source/drain regions of the first conductivity type formed in the second epitaxial semiconductor layer and the semiconductor substrate in the second region, the second impurity layer being located between the second source/drain regions; and

a third transistor including:

a third impurity layer of the first conductivity type formed in a third region of the semiconductor substrate;

a third epitaxial semiconductor layer formed above the third impurity layer and having a film thickness different from a film thickness of the first epitaxial semiconductor layer;

a third gate insulating film formed above the third epitaxial semiconductor layer and having a film thickness different from the film thicknesses of the first gate insulating film and the second gate insulating film;

a third gate electrode formed above the third gate insulating film; and

third source/drain regions of the second conductivity type formed in the third epitaxial semiconductor layer and the semiconductor substrate in the third region; and

a fourth transistor including:

a fourth impurity layer of the second conductivity type formed in a fourth region of the semiconductor substrate;

a fourth epitaxial semiconductor layer formed above the fourth impurity layer and having a film thickness different from the film thickness of the first epitaxial semiconductor layer;

a fourth gate insulating film formed above the fourth epitaxial semiconductor layer and having a film thickness different from the film thicknesses of the first gate insulating film and the second gate insulating film;

a fourth gate electrode formed above the fourth gate insulating film; and

fourth source/drain regions of the first conductivity type formed in the fourth epitaxial semiconductor layer and the semiconductor substrate in the fourth region.

10. The semiconductor device according to claim 9 , wherein

the film thickness of the first epitaxial semiconductor layer is larger than the film thickness of the second epitaxial semiconductor layer, and

a diffusion velocity of an impurity forming the first impurity layer is higher than a diffusion velocity of an impurity forming the second impurity layer.

11. The semiconductor device according to claim 9 , wherein

the second impurity layer contains boron and carbon.

12. The semiconductor device according to claim 11 , wherein

the first impurity layer contains arsenic.

13. The semiconductor device according to claim 9 , wherein

the first impurity layer contains boron and carbon.

14. The semiconductor device according to claim 13 , wherein

the second impurity layer contains antimony.

15. The semiconductor device according to claim 9 , wherein

a height of a surface of the first epitaxial semiconductor layer is equal to a height of a surface of the second epitaxial semiconductor layer.

Assignments (2)
CHANGE OF ADDRESS Recorded Dec 23, 2016
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 041188/0401 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 13, 2012
From: FUJITA, KAZUSHI; EMA, TAIJI; OGAWA, HIROYUKI
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 027529/0526 →
Priority Claims (1)
JP 2011-047764 · Mar 4, 2011 · national
Continuity (1)
Related Publication 20120223391A1 · Sep 6, 2012