Semiconductor light sources, systems, and methods
View Patent ↗A light-emitting diode includes a substrate, a lower cladding layer, an active layer having a quantum well of a thirty percent concentration of indium on the lower cladding layer, and an upper cladding layer. A method of manufacturing light-emitting diodes includes forming a lower cladding layer on a substrate, forming an active layer on the lower cladding layer such that the active layer has a quantum well of thirty percent indium, forming an upper cladding layer on the active layer, and forming a metal cap on the upper cladding layer.
1. A method of providing light-emitting diodes, comprising:
forming a lower cladding layer on a substrate;
forming an active layer on the lower cladding layer such that the active layer has a strained quantum well without strain compensation of thirty percent Indium;
forming an upper cladding layer on the active layer; and
forming a metal cap on the upper cladding layer;
further comprising forming a Bragg stack between the lower cladding layer and the active layer;
further comprising forming a strain-compensating layer adjacent the active layer;
further comprising adjusting a thickness and percentage of Indium in the strained quantum well to adjust a peak wavelength of the light-emitting diodes anywhere in a 1.0 to 1.1 μm band.
2. The method of claim 1 , wherein at least one of the lower cladding layer, the active layer, and the upper cladding layer are formed using molecular beam epitaxy.
3. The method of claim 1 , wherein at least one of the lower cladding layer, the active layer, and the upper cladding layer are formed using metal organic chemical vapor deposition.
4. The method of claim 1 , wherein forming the metal cap further comprises depositing a metal layer on the upper cladding layer and performing a lift off to leave a selective portion of the metal layer on the upper cladding.
5. The method of claim 1 , further comprising forming multiple light-emitting diodes in an array.
6. The method of claim 1 , further comprising depositing and annealing a back metal layer on a bottom side of the substrate.
7. The method of claim 6 , wherein a back metal AuGeNiAu layer is deposited and annealed on the bottom side of the substrate.
8. The method of claim 1 , wherein an ohmic p+ metal cap is formed on the upper cladding layer.
9. The method of claim 7 , wherein a TiPtAu ohmic p+ metal cap is formed on the upper cladding layer.