Direct contact semiconductor package with power transistor
View Patent ↗Some exemplary embodiments of an advanced direct contact leadless package and related structure and method, especially suitable for packaging high current semiconductor devices, have been disclosed. One exemplary structure comprises a mold compound enclosing a first contact lead frame portion, a paddle portion, and an extended contact lead frame portion held together by a mold compound. A first semiconductor device is attached on top of the lead frame portions as a flip chip, while a second semiconductor device is attached to a bottom side of said paddle portion and is in electrical contact with said the first semiconductor device. The extended contact lead frame portion is in direct electrical contact with the second semiconductor device without using a bond wire. Alternative exemplary embodiments may include additional extended lead frame portions, paddle portions, and semiconductor devices in various configurations.
1. A semiconductor package comprising:
a first contact lead frame portion, a paddle portion, and an extended contact lead frame portion held together by a mold compound, said portions being fabricated from a single piece lead frame;
a first semiconductor device attached as a flip chip to a top side of said first contact lead frame portion, a top side of said paddle portion, and a top side of said extended contact lead frame portion, said first semiconductor device enclosed by said mold compound;
a second semiconductor device attached to a bottom side of said paddle portion and in electrical contact with said first semiconductor device;
said extended contact lead frame portion being in direct electrical contact with said second semiconductor device without using a bond wire.
2. The semiconductor package of claim 1 , further comprising a printed circuit board (PCB) attached to a bottom side of said second semiconductor device.
3. The semiconductor package of claim 1 , wherein said first semiconductor device is a control integrated circuit (IC).
4. The semiconductor package of claim 1 , wherein said first semiconductor device is a combined control IC and power transistor.
5. The semiconductor package of claim 1 , wherein said second semiconductor device is a power transistor.
6. The semiconductor package of claim 5 , wherein a gate terminal of said power transistor is in electrical contact with said extended contact lead frame portion.
7. A semiconductor package comprising:
a first contact lead frame portion, a paddle portion, and an extended contact lead frame portion, said portions being fabricated from a single piece lead frame;
a first semiconductor device attached as a flip chip to a top side of said first contact lead frame portion, a top side of said paddle portion, and a top side of said extended contact lead frame portion;
a second semiconductor device attached to a bottom side of said paddle portion and in electrical contact with said first semiconductor device;
said extended contact lead frame portion being in electrical contact with said second semiconductor device.
8. The semiconductor package of claim 7 , further comprising a printed circuit board (PCB) attached to a bottom side of said second semiconductor device.
9. The semiconductor package of claim 7 , wherein said first semiconductor device is a control integrated circuit (IC).
10. The semiconductor package of claim 7 , wherein said first semiconductor device is a combined control IC and power transistor.
11. The semiconductor package of claim 7 , wherein said second semiconductor device is a power transistor.
12. The semiconductor package of claim 11 , wherein a gate terminal of said power transistor is in electrical contact with said extended contact lead frame portion.
13. A semiconductor package comprising:
a first contact lead frame portion, a paddle portion, and an extended contact lead frame portion, said portions being fabricated from a single piece lead frame;
a control integrated circuit (IC) attached as a flip chip to a top side of said first contact lead frame portion, a top side of said paddle portion, and a top side of said extended contact lead frame portion;
a power transistor attached to a bottom side of said paddle portion and in electrical contact with said control IC;
said extended contact lead frame portion being in electrical contact with said power transistor.
14. The semiconductor package of claim 13 , further comprising a printed circuit board (PCB) attached to a bottom side of said power transistor.
15. The semiconductor package of claim 13 , wherein said control IC includes another power transistor.
16. The semiconductor package of claim 13 , wherein a gate terminal of said power transistor is in electrical contact with said extended contact lead frame portion.