IP Library Granted Patent US 8,717,699
Granted Patent B1
US 8,717,699 · App. 13/347,562 · Granted May 6, 2014

Voltage quadrupler comprising a second charging capacitor charged using a first charging capacitor

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,717,699
App. No.
13/347,562
Granted
May 6, 2014
Kind
B1
Abstract

A voltage booster is disclosed comprising an input for receiving an input voltage Vin, a first charging capacitor C 1 , a second charging capacitor C 2 , and an output capacitor Cout. The output capacitor Cout is charged to four times Vin by connecting C 1 in parallel with Vin to charge C 1 to Vin, after charging C 1 to Vin, connecting C 2 in parallel with Vin plus C 1 to charge C 2 to twice Vin, after charging C 2 to twice Vin, connecting C 1 in parallel with Vin to recharge C 1 to Vin, and after recharging C 1 , connecting Cout in parallel with Vin plus C 1 plus C 2 to charge Cout to four times Vin.

Claims (79)

1. A voltage booster comprising:

an input for receiving an input voltage Vin;

a first charging capacitor C 1 ;

a second charging capacitor C 2 ;

an output capacitor Cout; and

control circuitry operable to charge the output capacitor Cout to four times Vin by:

connecting C 1 in parallel with Vin to charge C 1 to Vin;

after charging C 1 to Vin, connecting C 2 in parallel with Vin plus C 1 to charge C 2 to twice Vin;

after charging C 2 to twice Vin, connecting C 1 in parallel with Vin to recharge C 1 to Vin; and

after recharging C 1 , connecting Cout in parallel with Vin plus C 1 plus C 2 to charge Cout to four times Vin.

2. The voltage booster as recited in claim 1 , wherein the control circuitry is further operable to charge the output capacitor Cout to three times Vin by:

connecting C 1 in parallel with Vin to charge C 1 to Vin;

connecting C 2 in parallel with Vin to charge C 2 to Vin; and

after charging C 1 and C 2 to Vin, connecting Cout in parallel with Vin plus C 1 plus C 2 to charge Cout to three times Vin.

3. The voltage booster as recited in claim 2 , wherein Vin is a voltage with respect to a reference node, the voltage booster further comprising:

a first switch operable to connect C 1 to Vin and a second switch operable to connect C 1 to the reference node; and

the second switch and a third switch operable to connect C 2 to Vin and a fourth switch operable to connect C 2 to the reference node.

4. The voltage booster as recited in claim 2 , wherein Vin is a voltage with respect to a reference node, the voltage booster further comprising:

a single first switch operable to connect C 1 to Vin and a single second switch operable to connect C 1 to the reference node; and

a single third switch operable to connect C 2 to Vin and a single fourth switch operable to connect C 2 to the reference node.

5. A disk drive comprising:

a disk;

a head actuated over the disk; and

a voltage booster configurable into a first mode to boost a supply voltage (SV) by N and configurable into a second mode to boost a backup voltage (BV) by M greater than N; and

control circuitry operable to:

configure the voltage booster into the first mode during normal operation; and

configure the voltage booster into the second mode during a power failure.

6. The disk drive as recited in claim 5 , wherein the control circuitry is operable to configure the voltage booster into the second mode after the backup voltage decays below a threshold during the power failure.

7. The disk drive as recited in claim 5 , wherein N equals three and M equals four.

8. The disk drive as recited in claim 7 , wherein the voltage booster comprises a first charging capacitor C 1 , a second charging capacitor C 2 , and an output capacitor Cout, wherein the control circuitry is operable to charge the output capacitor Cout to four times BV by:

connecting C 1 in parallel with BV to charge C 1 to BV;

connecting C 2 in parallel with BV plus C 1 to charge C 2 to twice BV;

after charging C 2 to twice BV, connecting C 1 in parallel with BV to recharge C 1 to BV; and

after recharging C 1 , connecting Cout in parallel with BV plus C 1 plus C 2 to charge Cout to four times BV.

9. The disk drive as recited in claim 8 , wherein the control circuitry is further operable to charge the output capacitor Cout to three times SV by:

connecting C 1 in parallel with SV to charge C 1 to VS;

connecting C 2 in parallel with SV to charge C 2 to VS; and

after charging C 1 and C 2 to SV, connecting Cout in parallel with SV plus C 1 plus C 2 to charge Cout to three times SV.

10. The disk drive as recited in claim 9 , wherein VS is a voltage with respect to a reference node, the voltage booster further comprising:

a first switch operable to connect C 1 to VS and a second switch operable to connect C 1 to the reference node; and

the second switch and a third switch operable to connect C 2 to VS and a fourth switch operable to connect C 2 to the reference node.

11. The disk drive as recited in claim 9 , wherein VS is a voltage with respect to a reference node, the voltage booster further comprising:

a single first switch operable to connect C 1 to VS and a single second switch operable to connect C 1 to the reference node; and

a single third switch operable to connect C 2 to VS and a single fourth switch operable to connect C 2 to the reference node.

12. A method of operating a voltage booster, the voltage booster comprising an input for receiving an input voltage Vin, a first charging capacitor C 1 , a second charging capacitor C 2 , and an output capacitor Cout, the method comprising charging the output capacitor Cout to four times Vin by:

connecting C 1 in parallel with Vin to charge C 1 to Vin;

after charging C 1 to Vin, connecting C 2 in parallel with Vin plus C 1 to charge C 2 to twice Vin;

after charging C 2 to twice Vin, connecting C 1 in parallel with Vin to recharge C 1 to Vin; and

after recharging C 1 , connecting Cout in parallel with Vin plus C 1 plus C 2 to charge Cout to four times Vin.

13. The method as recited in claim 12 , further comprising charging the output capacitor Cout to three times Vin by:

connecting C 1 in parallel with Vin to charge C 1 to Vin;

connecting C 2 in parallel with Vin to charge C 2 to Vin; and

after charging C 1 and C 2 to Vin, connecting Cout in parallel with Vin plus C 1 plus C 2 to charge Cout to three times Vin.

14. The method as recited in claim 13 , wherein Vin is a voltage with respect to a reference node, the method further comprising:

connecting C 1 to Vin through a first switch and connecting C 1 to the reference node through a second switch; and

connecting C 2 to Vin through the second switch and a third switch and connecting C 2 to the reference node through a fourth switch.

15. The method as recited in claim 13 , wherein Vin is a voltage with respect to a reference node, the method further comprising:

connecting C 1 to Vin through a single first switch and connecting C 1 to the reference node through a single second switch; and

connecting C 2 to Vin through a single third switch and connecting C 2 to the reference node through a single fourth switch.

16. A method of operating a disk drive comprising, the disk drive comprising a disk, a head actuated over the disk, and a voltage booster configurable into a first mode to boost a supply voltage (SV) by N and configurable into a second mode to boost a backup voltage (BV) by M greater than N, the method comprising:

configuring the voltage booster into the first mode during normal operation; and

configuring the voltage booster into the second mode during a power failure.

17. The method as recited in claim 16 , further comprising configuring the voltage booster into the second mode after the backup voltage decays below a threshold during the power failure.

18. The method as recited in claim 16 , wherein N equals three and M equals four.

19. The method as recited in claim 18 , wherein the voltage booster comprises a first charging capacitor C 1 , a second charging capacitor C 2 , and an output capacitor Cout, the method further comprising charging the output capacitor Cout to four times BV by:

connecting C 1 in parallel with BV to charge C 1 to BV;

connecting C 2 in parallel with BV plus C 1 to charge C 2 to twice BV;

after charging C 2 to twice BV, connecting C 1 in parallel with BV to recharge C 1 to BV; and

after recharging C 1 , connecting Cout in parallel with BV plus C 1 plus C 2 to charge Cout to four times BV.

20. The method as recited in claim 19 , further comprising charging the output capacitor Cout to three times SV by:

connecting C 1 in parallel with SV to charge C 1 to VS;

connecting C 2 in parallel with SV to charge C 2 to VS; and

after charging C 1 and C 2 to SV, connecting Cout in parallel with SV plus C 1 plus C 2 to charge Cout to three times SV.

21. The method as recited in claim 20 , wherein VS is a voltage with respect to a reference node, the method further comprising:

connecting C 1 to Vin through a first switch and connecting C 1 to the reference node through a second switch; and

connecting C 2 to Vin through the second switch and a third switch and connecting C 2 to the reference node through a fourth switch.

22. The method as recited in claim 20 , wherein VS is a voltage with respect to a reference node, the method further comprising:

connecting C 1 to Vin through a single first switch and connecting C 1 to the reference node through a single second switch; and

connecting C 2 to Vin through a single third switch and connecting C 2 to the reference node through a single fourth switch.

Assignments (8)
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 038744 FRAME 0481 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058982/0556 →
RELEASE OF SECURITY INTEREST Recorded Mar 5, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 045501/0714 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038744/0281 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038722/0229 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038744/0481 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 10, 2012
From: FERRIS, TIMOTHY A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 027511/0303 →