IP Library Granted Patent US 8,242,481
Granted Patent B2
US 8,242,481 · App. 13/352,533 · Granted Aug 14, 2012

Nanowhiskers with PN junctions, doped nanowhiskers, and methods for preparing them

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Quick Facts
Patent No.
US 8,242,481
App. No.
13/352,533
Granted
Aug 14, 2012
Kind
B2
Abstract

Nano-engineered structures are disclosed, incorporating nanowhiskers of high mobility conductivity and incorporating pn junctions. In one embodiment, a nanowhisker of a first semiconducting material has a first band gap, and an enclosure comprising at least one second material with a second band gap encloses said nanoelement along at least part of its length, the second material being doped to provide opposite conductivity type charge carriers in respective first and second regions along the length of the of the nanowhisker, whereby to create in the nanowhisker by transfer of charge carriers into the nanowhisker, corresponding first and second regions of opposite conductivity type charge carriers with a region depleted of free carriers therebetween.

Claims (12)

1. A semiconductor device, comprising:

a III-V semiconductor nanowhisker of a first conductivity type standing upright from a substrate; and

a bulk III-V semiconductor layer of a second conductivity type located around at least a portion of the nanowhisker;

wherein:

the bulk III-V semiconductor layer has a thickness greater than 200 nm; and

the III-V semiconductor nanowhisker and the bulk III-V semiconductor layer comprise portions of a semiconductor junction.

2. The device of claim 1 , wherein the first conductivity type comprises n-type and the second conductivity type comprises p-type.

3. The device of claim 1 , wherein the first conductivity type comprises p-type and the second conductivity type comprises n-type.

4. The device of claim 1 , wherein the nanowhisker comprises a one dimensional nanoelement.

5. The device of claim 1 , wherein the substrate comprises a III-V semiconductor substrate.

6. The device of claim 1 , wherein the nanowhisker is formed on the substrate by a VLS process using a gold particle, and the gold particle is located on top of the nanowhisker.

7. The device of claim 1 , wherein the semiconductor junction comprises a pn junction.

Assignments (1)
ASSIGNMENT OF IP SECURITY AGREEMENT Recorded Dec 12, 2018
From: GLO AB
To: HERCULES CAPITAL, INC., AS ADMINISTRATIVE AGENT
Reel/Frame 049042/0527 →