IP Library Granted Patent US 8,956,917
Granted Patent B2
US 8,956,917 · App. 13/353,826 · Granted Feb 17, 2015

Semiconductor device, and manufacturing method and manufacturing apparatus of the same

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Quick Facts
Patent No.
US 8,956,917
App. No.
13/353,826
Granted
Feb 17, 2015
Kind
B2
Abstract

According to one embodiment, a manufacturing method of a semiconductor device is disclosed. The method includes: (a) forming cutting grooves in an element formation surface of a semiconductor wafer on which semiconductor elements are formed; (b) applying a protection tape on the element formation surface of the semiconductor wafer; (c) grinding a rear surface of the semiconductor wafer to thin the semiconductor wafer and to divide the semiconductor wafer into a plurality of semiconductor chips on which the semiconductor elements are formed; (d) forming an adhesive layer on the rear surface of the semiconductor wafer; (e) separating and cutting the adhesive layer for each of the semiconductor chips; and (f) removing the protection tape. The (e) is performed by spraying a high-pressure air to the adhesive layer formed on the rear surface of the semiconductor wafer while melting or softening the adhesive layer by heating.

Claims (33)

1. A manufacturing method of a semiconductor device, comprising:

(a) forming cutting grooves in an element formation surface of a semiconductor wafer on which semiconductor elements are formed;

(b) applying a protection tape on the element formation surface of the semiconductor wafer;

(c) grinding a rear surface of the semiconductor wafer to thin the semiconductor wafer and to divide the semiconductor wafer into a plurality of semiconductor chips on which the semiconductor elements are formed;

(d) forming an adhesive layer on the rear surface of the semiconductor wafer;

(e) spraying a high-pressure air to the adhesive layer formed on the rear surface of the semiconductor wafer while melting or softening the adhesive layer by heating, to separate and cut the adhesive layer for each of the semiconductor chips; and

(f) removing the protection tape.

2. The method according to claim 1 ,

wherein (e) is performed so as to cause a cutting end of the adhesive layer to cover at least part of a side surface of each of the semiconductor chips.

3. The method according to claim 2 ,

wherein the side surface of each of the semiconductor chips is covered by the cutting end of the adhesive layer up to at least a 5 μm depth from the rear surface.

4. The method according to claim 2 ,

wherein the side surface of each of the semiconductor chips is covered by the cutting end of the adhesive layer up to at least one-eighth of the depth of the cutting grooves from the rear surface.

5. The method according to claim 1 ,

wherein in (e), the adhesive layer is simultaneously sprayed and heated by using a high-temperature high-pressure air as the spraying air.

6. The method according to claim 5 ,

wherein a temperature of the high-temperature high-pressure air is within a range of not lower than 50° C. nor higher than 200° C.

7. The method according to claim 5 ,

wherein a pressure of the high-temperature high-pressure air is 0.15 MPa or more.

8. The method according to claim 5 ,

wherein the high-temperature high-pressure air is sprayed to the adhesive layer at a flow rate of 0.005 m 3 /s or more.

9. The method according to claim 1 ,

wherein in (e), the high-pressure air is sprayed along the cutting grooves.

10. The method according to claim 1 ,

wherein (e) is performed while the semiconductor wafer is placed on a cooling stage and the protection tape applied on the semiconductor wafer is cooled.

11. The method according to claim 1 ,

wherein (e) includes mounting the semiconductor wafer on a heating stage and applying preliminary or auxiliary heating to the adhesive layer.

12. The method according to claim 1 ,

wherein the adhesive layer contains a trapping agent for a metal impurity ion.

13. The method according to claim 12 ,

wherein the metal impurity ion is at least one kind selected from Cu, Fe, Au, and Na ions.

14. The method according to claim 12 ,

wherein a substantially whole side surface of each of the semiconductor chips is covered by a cutting end of the adhesive layer.

Assignments (5)
MERGER Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 24, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 043709/0035 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 8, 2012
From: KUROSAWA, TETSUYA; TAKYU, SHINYA; TOMONO, AKIRA
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 027672/0567 →