SEMICONDUCTOR DEVICE WITH LATERAL AND VERTICAL CHANNEL CONFINEMENT AND METHOD OF FABRICATING THE SAME
Semiconductor devices and methods of making semiconductor devices are provided. Boron diffusion into source/drain regions is restricted by a vertical and lateral confinement area formed on the surfaces of the source/drain regions. In an aspect, a silicon-carbon layer formed on the surface of the channel region suppresses boron diffusion toward a first source/drain region and toward at least a second source/drain region.
1 . A semiconductor device, comprising:
a semiconductor substrate comprising a first transistor region and a second transistor region, the first transistor region and the second transistor region are isolated by an element isolation region;
a channel region formed under a first gate electrode;
a first source/drain region formed on a first side of the channel region;
a second source/drain region formed on a second side of the channel region;
a boron doped layer;
a silicon-carbon layer formed on the boron doped layer and on a surface of the channel region; and
a silicon epitaxial channel layer formed on the silicon-carbon layer and on the surface of the channel region, wherein diffusion of the boron doped layer into the channel region is suppressed by the silicon-carbon layer and the silicon epitaxial channel layer formed on the surface of the channel region and wherein the silicon-carbon layer formed on the surface of the channel region suppresses boron diffusion toward the first source/drain region and the second source/drain region.
2 . The semiconductor device of claim 1 , wherein channel dopant comprises indium.
3 . The semiconductor device of claim 1 , wherein the first source/drain region and the second source/drain region comprise phosphorus doped epitaxial silicon.
4 . The semiconductor device of claim 1 , wherein lateral boron diffusion is retarded by the silicon-carbon layer and the silicon epitaxial channel layer formed on the surface of the channel region.
5 . The semiconductor device of claim 1 , wherein silicon-carbon epitaxial layers are formed at an active region beside a shallow trench isolation region.
6 . The semiconductor device of claim 5 , wherein channel dopant comprises indium.
7 . The semiconductor device of claim 5 , wherein the first source/drain region and the second source/drain region comprise phosphorus doped epitaxial silicon.
8 . The semiconductor device of claim 7 , wherein channel dopant comprises indium.
9 . The semiconductor device of claim 1 , wherein silicon-carbon epitaxial layers are carbon doped at an active region beside a shallow trench isolation region.
10 . The semiconductor device of claim 9 , wherein channel dopant comprises indium.
11 . The semiconductor device of claim 9 , wherein the first source/drain region and the second source/drain region comprise phosphorus doped epitaxial silicon.
12 . The semiconductor device of claim 9 , wherein the channel dopant comprises indium.
13 . A semiconductor device, comprising:
at least one channel region formed under a gate electrode;
a first source/drain region recessed on a first side of the at least one channel region;
a second source/drain region recessed on a second side of the at least one channel region;
silicon-carbon layers formed laterally and vertically within the first source/drain region and the second source/drain region;
a boron doped layer adjacent the first source/drain region and the second source/drain region, wherein diffusion of the boron doped layer into the first source/drain region and the second source/drain region is restricted by the silicon-carbon layers formed laterally and vertically within the first source/drain region and the second source/drain region.
14 . The semiconductor device of claim 13 , wherein the first source/drain region and the second source/drain region comprise phosphorus doped epitaxial silicon.
15 . The semiconductor device of claim 13 , wherein the silicon-carbon layers formed laterally and vertically within the first source/drain region and the second source/drain region are epitaxially grown silicon-carbon layers.
16 . The semiconductor device of claim 13 , wherein the silicon-carbon layers are formed at an active region beside a shallow trench isolation region.
17 . The semiconductor device of claim 13 , wherein silicon-carbon epitaxial layers are carbon doped at an active region beside a shallow trench isolation region.
18 . A method of processing a semiconductor structure, comprising:
forming a boron doped layer on a semiconductor substrate;
forming a silicon-carbon layer on the boron doped layer;
forming a silicon epitaxial channel layer on the silicon-carbon layer;
forming a first channel region under a first gate electrode;
recessing a first source/drain region on a first side of the first channel region;
recessing a second source/drain region on a second side of the first channel region; and
epitaxially growing silicon-carbon layers on vertical and lateral surfaces of the first source/drain region and the second source/drain region.
19 . The method of claim 18 , wherein epitaxially growing the silicon-carbon layers comprises causing a channel dopant to be confined by the silicon-carbon layers on the vertical and lateral surfaces.
20 . The method of claim 19 , further comprising forming the channel dopant with indium.