IP Library Granted Patent US 8,487,311
Granted Patent B2
US 8,487,311 · App. 13/365,221 · Granted Jul 16, 2013

Pixel structure

Inventors: Chun-Yen Liu (Hsinchu County, TW); Cheng-Chieh Tseng (Hsinchu County, TW); Chia-Yuan Yeh (Hsinchu, TW)
Assignee: Au Optronics Corporation
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Quick Facts
Patent No.
US 8,487,311
App. No.
13/365,221
Granted
Jul 16, 2013
Kind
B2
Abstract

A pixel structure including a semiconductor layer having at least one source region and at least one drain region; a first insulating layer covering the semiconductor layer; a first conductive layer on the first insulating layer and including at least one gate; a second insulating layer covering the first conductive layer; a second conductive layer on the second insulating layer and including at least one source electrode, at least one drain electrode and at least one bottom electrode, the source region, the source electrode, the drain region, the drain electrode and the gate forming at least one thin film transistor; a third insulating layer covering the second conductive layer; a third conductive layer on the third insulating layer and including at least one top electrode, the top electrode and the bottom electrode forming at least one capacitor; and a pixel electrode electrically connected to the thin film transistor.

Claims (15)

1. A pixel structure, comprising:

a semiconductor layer, comprising at least one source region and at least one drain region;

a first insulating layer, covering the semiconductor layer;

a first conductive layer, disposed on the first insulating layer and comprising at least one gate;

a second insulating layer, covering the first conductive layer;

a second conductive layer, disposed on the second insulating layer and comprising at least one source electrode, at least one drain electrode and at least one bottom electrode, wherein the at least one source electrode and the at least one drain electrode are electrically connected to the at least one source region and the at least one drain region of the semiconductor layer, respectively, and the at least one source region, the at least one source electrode, the at least one drain region, the at least one drain electrode and the at least one gate form at least one thin film transistor;

a third insulating layer, covering the second conductive layer;

a third conductive layer, disposed on the third insulating layer and comprising at least one top electrode, wherein the at least one top electrode of the third conductive layer and the at least one bottom electrode of the second conductive layer form at least one capacitor; and

a pixel electrode, disposed above the third conductive layer and electrically connected to the at least one thin film transistor.

2. The pixel structure as claimed in claim 1 , further comprising a planarization layer covering the third conductive layer, and the pixel electrode is disposed on the planarization layer.

3. The pixel structure as claimed in claim 1 , further comprising:

a light emitting region defining layer, disposed on the pixel electrode and having an opening exposing the pixel electrode;

a light emitting layer, disposed on the pixel electrode exposed by the opening; and

an electrode layer, disposed on the light emitting layer.

4. The pixel structure as claimed in claim 1 , wherein the at least one thin film transistor comprises six thin film transistors.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 24, 2025
From: AUO CORPORATION
To: NEOLAYER LLC
Reel/Frame 072266/0941 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 6, 2012
From: LIU, CHUN-YEN; TSENG, CHENG-CHIEH; YEH, CHIA-YUAN
To: AU OPTRONICS CORPORATION
Reel/Frame 027660/0637 →
Priority Claims (1)
TW 100120435 A · Jun 10, 2011 · national
Continuity (1)
Related Publication 20120313100A1 · Dec 13, 2012