Semiconductor device and method for tracing a memory of a semiconductor device
View Patent ↗An embodiment of the invention provides a memory on a semiconductor device that has a plurality of memory areas where each memory area has a plurality of consecutive bits. Further, the semiconductor device includes a tag memory having a plurality of trace tags, each trace tag including at least one bit. Each memory area of the memory is mapped to a trace tag that indicates whether the respective memory area is selected for tracing or not. Each memory area and the assigned trace tag are read out and address of the memory area is forwarded to a trace module when an assigned trace tag indicates that the memory area is selected for tracing. When the assigned trace tag indicates that the memory area is not selected for tracing, data and address is discarded.
1. A method for tracing a memory of a semiconductor device, the memory having a plurality of memory areas each comprising a plurality of bits, the semiconductor device further comprising a tag memory comprising a plurality of trace tags, each trace tag comprising at least one bit, method comprising the steps of:
a) mapping each memory area of the memory to a trace tag that indicates whether or not the respective memory area is selected for tracing,
b) accessing each memory area of the memory and reading the assigned trace tag and
c) capturing data of the memory areas when an assigned trace tag indicates that the memory area is selected for tracing, and
d) discarding data of the memory areas when an assigned trace tag indicates that the memory area is not selected for tracing;
wherein the step of accessing a respective memory area of the memory and the step of reading the assigned trace tag of the trace memory are performed within a same system clock cycle.
2. The method of claim 1 , wherein the step of capturing or discarding data of the respective memory area having a trace tag indicating that the assigned memory area is selected or not selected for tracing is performed in a following or the subsequent system clock cycle with respect to the clock cycle in which the memory area and the assigned trace tag are accessed.
3. A semiconductor device comprising a memory having a plurality of memory areas comprising a plurality of bits and a trace memory having a plurality of trace tags, each comprising at least one bit, wherein each memory area is assigned to a trace tag that indicates whether the respective memory area is selected for tracing or not, the semiconductor device further comprises a trace module for receiving data of memory areas that are selected for tracing;
further comprising: a first register that is configured for temporarily storing an address of a selected memory area, a second register that is configured for temporarily storing data of the selected memory area and a third register that is configured for temporarily storing data of the trace tag that is assigned to the selected memory area;
wherein the semiconductor device is further configured to forward the address from the first register to the trace module and to forward data from the second register to the trace module if the trace tag indicates that the respective memory area is selected for tracing;
further comprising a first and a second multiplexer, wherein the first multiplexer is configured receive the address from the first register and the second multiplexer is configured to receive data from the second register, the semiconductor device is further configured to forward the address from the first multiplexer to the trace module and to forward data from the second multiplexer to the trace module, if the trace tag in the third register indicates that the respective memory area is selected for tracing and the semiconductor device is further configured to discard the data for tracing, if the trace tag in the third register indicates that the respective memory area is not selected for tracing.