Semiconductor device and method of manufacturing the same
To prevent contact plugs formed to sandwich an abutting portion between gate electrodes, from being short-circuited via a void formed inside an insulating film of the abutting portion. Over sidewalls SW facing each other in the abutting portion between gate electrodes G 2 and G 5 , a liner insulating film 6 and an interlayer insulating film 7 are formed. Between the sidewalls SW, the liner insulating film 6 formed on each of the side walls of the sidewalls SW are brought in contact with each other to close a space between the sidewalls SW to prevent a void from being generated inside the interlayer insulating film 7 and the liner insulating film 6.
1. A method of manufacturing a semiconductor device, the method comprising the steps of:
(a) forming a first gate electrode, a second gate electrode, and a third gate electrode extending in a first direction along a major surface of a semiconductor substrate, the first gate electrode and the second to electrode being aligned in the first direction and the first gate electrode and the third gate electrode being aligned in a second direction perpendicular to the first direction, over the semiconductor substrate via a gate insulating film;
(b) forming source/drain regions on the major surface of the semiconductor substrate on both sides of the first, second, and third gate electrodes in the second direction,
(c) forming a first sidewall on a side wall of the first gate electrode, a second sidewall on a side wall of the second gate electrode, and a third sidewall on a side wall of the third gate electrode,
(d) after the step (b) and step (c), sequentially forming a first insulating film and a second insulating film over the semiconductor substrate from the semiconductor substrate to cover the first, second, and third gate electrodes, the source/drain region, and the first, second, and third sidewalls,
(e) between the first gate electrode and the third gate electrode in the second direction of a planar view, forming a first through-hole penetrating the first insulating film and the second insulating film and subsequently forming a contact plug inside the first through-hole,
wherein the first direction is a gate width direction,
wherein the second direction is a gate length direction,
wherein the first gate electrode is disposed adjacent the second gate electrode in the first direction,
wherein the first gate electrode is disposed adjacent the third gate electrode in the second direction,
wherein the first insulating film is an insulating film including a silicon nitride film, and serves as an etching stopper film in forming the first through-hole, and
wherein a first lowest position of the upper surface of the first insulating film disposed in a first region between the first gate electrode and the second gate electrode in the first direction of a planar view is higher than a second lowest position of the upper surface of the first insulating film disposed in a second region between the first gate electrode and the third gate electrode in the second direction of a planar view.
2. The method of manufacturing a semiconductor device according to claim 1 ,
wherein a first length between an upper surface of the semiconductor substrate and the first lowest position of the upper surface of the first insulating film is greater than a second length between the upper surface of the semiconductor substrate and an upper surface of the first gate electrode.
3. The method of manufacturing a semiconductor device according to claim 1 ,
wherein in the step (d), between the adjacent gate electrodes in the first direction, a void covered with the second insulating film is formed.
4. The method of manufacturing a semiconductor device according to claim 1 ,
wherein in the step (c), a silicon oxide film and a silicon nitride film are sequentially formed from the semiconductor substrate,
wherein the first, second, and third sidewalls including the silicon oxide film and the silicon nitride film are formed on the side walls of the first, second, and third gate electrodes by removing a part of the silicon oxide film and the silicon nitride film, and
wherein the method includes the step of removing the silicon nitride film after the step (c) and before the step (d).
5. The method of manufacturing a semiconductor device according to claim 1 ,
wherein the first, second and third gate electrode comprise a static random access memory.
6. The method of manufacturing a semiconductor device according to claim 1 ,
wherein the second insulating film is an insulating film including a silicon oxide film.