IP Library Patent Application 13370746
Patent Application
App. No. 13/370,746

METHOD FOR DETERMINING DESIGN VALUES FOR CRYSTAL OSCILLATOR CIRCUIT AND ELECTRONIC APPARATUS

Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US None
App. No.
13/370,746
Abstract

According to the invention, two of three design values, i.e., the negative resistance RL, load capacitance CL and drive current Ios of a crystal oscillator circuit including a crystal resonator are determined to determine the remaining one design value from a relation equation or relation graph. As a result, reducing the CL of the crystal oscillator circuit allows the drive current Ios to be reduced, achieving reduced power consumption of the crystal oscillator circuit.

Claims (27)

1 . A method for determining design values for a crystal oscillator circuit, wherein two of three design values, i.e., the negative resistance RL, load capacitance CL and drive current Ios of a crystal oscillator circuit including a crystal resonator are determined to determine the remaining one design value from a relation equation or relation graph.

2 . The method for determining design values for a crystal oscillator circuit according to claim 1 , wherein, with the negative resistance RL set to a constant value, a relation equation between the drive current Ios and the load capacitance CL is expressed by a quadratic relation Ios=a*(CL) 2 +β*(CL)+γ (α, β, and γ are constants), then the drive current Ios is determined from the load capacitance CL using the relation equation, or the load capacitance CL is determined from the drive current Ios using the relation equation.

3 . The method for determining design values for a crystal oscillator circuit according to claim 2 , wherein relation equations between the drive current Ios and the load capacitance CL with at least two negative resistances RL (RL 1 and RL 2 ) previously obtained are given by:

Ios=c 1*( CL ) 2 +d 1*( CL )+ e 1( RL=RL 1) and

Ios=c 2*( CL ) 2 +d 2*( CL )+ e 2( RL=RL 2),

then, using these equations,

a relation equation between the drive current Ios and the load capacitance CL with a negative resistance RL 0 is determined as follows:

Ios=c 0*( CL ) 2 +d 0*( CL )+ e 0( RL=RL 0).

4 . The method for determining design values for a crystal oscillator circuit according to claim 3 , wherein, if RL 1 <RL 0 <RL 2 , the equations

Ios=c 1*( CL ) 2 +d 1*( CL )+ e 1( RL=RL 1) and

Ios=c 2*( CL ) 2 +d 2*( CL )+ e 2( RL=RL 2)

are used to determine on a simple pro-rata basis a relation equation between the drive current Ios and the load capacitance CL with the negative resistance RL 0 as follows:

Ios=c 0*( CL ) 2 +d 0*( CL )+ e 0( RL=RL 0).

5 . The method for determining design values for a crystal oscillator circuit according to claim 1 , wherein, with the drive current Ios set to a constant value, a relation equation between the load capacitance CL and the negative resistance RL is expressed by CL=a*(RL) b (a and b are constants), then the load capacitance CL is determined from the negative resistance RL using the relation equation, or the negative resistance RL is determined from the load capacitance CL using the relation equation.

6 . The method for determining design values for a crystal oscillator circuit according to claim 5 , wherein relation equations between the negative resistance RL and the load capacitance CL with at least two drive currents Ios (Ios 1 and Ios 2 ) previously obtained are given by:

CL=a 1*( RL ) b1 ( Ios=Ios 1) and

CL=a 2*( RL ) b2 ( Ios=Ios 2),

then, using these equations,

a relation equation between the negative resistance RL and the load capacitance CL with a drive current Ios 0 is determined as follows:

CL=a 0*( RL ) b0 ( Ios=Ios 0).

7 . The method for determining design values for a crystal oscillator circuit according to claim 6 , wherein b=b 1 =b 2 =b 0 =−0.5.

8 . The method for determining design values for a crystal oscillator circuit according to claim 7 , wherein, if Ios 1 <Ios 0 <Ios 2 , the equations

CL=a 1*( RL ) b1 ( Ios=Ios 1) and

CL=a 2*( RL ) b2 ( Ios=Ios 2)

are used to determine a relation equation between the negative resistance RL and the load capacitance CL with a drive current Ios 0 as follows:

CL=a 0*( RL ) b0 ( Ios=Ios 0).

9 . An electronic apparatus comprising a crystal oscillator circuit the design values for which are determined using the method for determining design values for a crystal oscillator circuit according to claim 1 .

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 26, 2013
From: SEIKO INSTRUMENTS INC.
To: SII CRYSTAL TECHNOLOGY INC.
Reel/Frame 031085/0852 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 10, 2012
From: SOUMA, HIROYUKI
To: SEIKO INSTRUMENTS INC.
Reel/Frame 027687/0630 →