IP Library Granted Patent US 9,264,529
Granted Patent B2
US 9,264,529 · App. 13/372,091 · Granted Feb 16, 2016

Drive strength adjustment through voltage auto-sense

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Quick Facts
Patent No.
US 9,264,529
App. No.
13/372,091
Granted
Feb 16, 2016
Kind
B2
Abstract

An integrated circuit supports auto-sense of voltage for drive strength adjustment. The method may comprise detecting an input voltage received at an auto-sense pad integrated on a mobile multimedia processing (MMP) chip. The input voltage may be a power supply voltage of the peripheral device received during power-up of the MMP chip, power-up of the peripheral circuitry, and/or dynamically while the MMP is powered-up. The auto-sense pad may adjust drive strength of at least one other pad, which may be an output pad or a bidirectional pad, integrated on the MMP chip may be configured to operate using the determined output voltage. A rise time and/or fall time of signals output by the MMP chip may be varied by the adjustment of the drive strength.

Claims (28)

1. A method for controlling pads of a processor chip, the method comprising:

detecting, on the processor chip, a voltage present at an auto-sense pad integrated with the processor chip; and

adjusting a drive characteristic of a signal pad also integrated with the processor chip, responsive to the voltage detected, the signal pad configured to couple the processor chip to a peripherial device.

2. The method of claim 1 , where adjusting the drive characteristic comprises adjusting a voltage applied to the signal pad.

3. The method according to claim 1 , wherein the voltage comprises a peripheral device power supply voltage.

4. The method according to claim 1 , wherein the signal pad comprises an output pad or a bidirectional pad.

5. The method according to claim 1 , wherein adjusting the drive characteristic comprises adjusting a signal rise time.

6. The method according to claim 1 , wherein adjusting the drive characteristic comprises adjusting current drive.

7. The method according to claim 1 , wherein adjusting the drive characteristic comprises adjusting a fall time of a signal.

8. A processor chip pad control system comprising:

voltage detection circuitry on a processor chip that detects a voltage present at an auto- sense pad integrated on the processor chip; and

responsive to the voltage, drive adjustment circuitry on the processor chip that adjusts a drive characteristic of a signal pad also integrated on the processor chip, the signal pad configured to couple the processor chip to a peripherial device.

9. The system according to claim 8 , wherein the voltage comprises a peripheral device power supply voltage.

10. The system according to claim 8 , wherein the signal pad comprises an output pad or a bidirectional pad.

11. The system according to claim 8 , where the drive characteristic comprises a voltage applied to the signal pad.

12. The system according to claim 8 , where the drive characteristic comprises a rise time.

13. The system according to claim 8 , where the processor chip adjust the drive characteristic by adjusting current drive.

14. The system according to claim 8 , where the drive characteristic comprises a fall time.

15. A product comprising:

a machine-readable medium, other than a transitory signal; and

instructions stored on the machine-readable medium that, when executed, cause a machine to:

detect a voltage present at an auto-sense pad integrated with a processor chip; and

responsive to the voltage, adjust a drive characteristic of a signal pad also integrated with the processor chip, the signal pad configured to couple the processor chip to a peripherial device.

16. The product of claim 15 , wherein the voltage comprises a peripheral device power supply voltage.

17. The product of claim 15 , where the drive characteristic comprises a voltage applied to the signal pad.

18. The product of claim 15 , where the drive characteristic comprises a rise time.

19. The product of claim 15 , where the instructions cause the machine to adjust the drive characteristic comprises by adjusting current drive.

20. The system according to claim 15 , where the drive characteristic comprises a fall time.

Assignments (7)
CORRECTIVE ASSIGNMENT TO CORRECT THE PATENT NUMBER 9,385,856 TO 9,385,756 PREVIOUSLY RECORDED AT REEL: 47349 FRAME: 001. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 22, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 051144/0648 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE PREVIOUSLY RECORDED ON REEL 047229 FRAME 0408. ASSIGNOR(S) HEREBY CONFIRMS THE THE EFFECTIVE DATE IS 09/05/2018. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047349/0001 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047229/0408 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 15, 2012
From: BARLOW, STEPHEN J.; WHITFIELD, MARTIN; RAMSDALE, TIMOTHY J.
To: BROADCOM CORPORATION
Reel/Frame 027709/0939 →