METHOD FOR MANUFACTURING AN ELECTRONIC DEVICE

1 . A method for manufacturing an electronic device, the method comprising:

etching a shallow trench structure;

etching a deep trench trench structure;

applying a liner oxide in the deep and shallow trench structure;

depositing an amorphous polysilicon liner on top of the liner oxide;

depositing a nitride liner on top of the amorphous polysilicon liner, and

filling the deep and shallow trenches with oxide.

2 . The method according to claim 1 , further comprising:

forming a CMOS tank on a silicon substrate in a silicon insulated technology;

applying a first layer of photo resist on the CMOS tank;

etching the shallow trench isolation structure;

removing the photo resist;

performing a liner oxidation step;

applying a second layer of photo resist;

etching the deep trench structure;

removing the second photo resist layer;

removing undesired oxide;

applying the liner oxide;

depositing the amorphous polysilicon liner;

depositing the nitride liner;

depositing the fill oxide;

performing a mechanical polishing (CMP) step, and

performing a plasma etching step.

3 . The method according to claim 2 , wherein the step of plasma etching is configured to overetch in order to adjust a nitride/polysilicon position.

4 . The method according to claim 2 , wherein a further etching step is performed for removing the liner oxide and defining thereby the fill oxide height.

5 . The method according to claim 4 , wherein the etching step for removing the liner oxide and defining the fill oxide height is a wet etching step.

6 . A semiconductor electronic device in a silicon insulator technology, wherein a shallow trench and deep trench structure comprises a liner of an oxide, a liner of amorphous polysilicon on top of the oxide and a layer of nitride on top of the amorphous polysilicon which is covered by a fill oxide for filling the shallow and deep trench structure.