Nonvolatile semiconductor memory device

1. An electrically erasable and programmable nonvolatile semiconductor memory device, comprising:

a first conductivity-type semiconductor substrate;

a second conductivity-type source region and a drain region disposed apart to face each other on a surface of the semiconductor substrate;

a channel formation region sandwiched by the source region and the drain region, formed on the surface of the semiconductor substrate;

a floating gate electrode disposed on a gate insulating film over the source region, the drain region and the channel region;

a control gate electrode disposed on a control insulating film over the floating gate electrode and capacitively coupled to the floating gate electrode;

a hole disposed in a part of the drain region, formed from a surface of the drain region to an inside thereof;

a protrusion extended from the floating gate electrode, arranged to fill the hole;

a tunneling restriction region disposed around the protrusion for defining a tunnel region; and

a tunnel insulating film formed between a surface of the hole and a surface of the protrusion in the tunnel region.

2. An electrically erasable and programmable nonvolatile semiconductor memory device according to claim 1 ; wherein the tunneling restriction region is an electrically floating first conductivity-type region disposed in a vicinity of the surface of the drain region around the hole.

3. An electrically erasable and programmable nonvolatile semiconductor memory device according to claim 2 ; further comprising a second tunneling restriction region being an electrically floating first conductivity-type region, disposed along a bottom surface of the hole formed in the drain region.

4. An electrically erasable and programmable nonvolatile semiconductor memory device according to claim 2 ; wherein at least one of the tunnel insulating film and the control insulating film is a composite film of a silicon oxide film and a silicon nitride film.

5. An electrically erasable and programmable nonvolatile semiconductor memory device according to claim 2 ; wherein an edge of a bottom region of the hole formed in the drain region is rounded to give a round shape to the bottom region.

6. An electrically erasable and programmable nonvolatile semiconductor memory device according to claim 1 ; wherein the tunneling restriction region is a second tunnel insulating film having a thickness thicker than that of the tunnel insulating film formed on the tunnel region, disposed between the protrusion and a second conductivity-type high impurity concentration region disposed in a vicinity of the surface of the drain region around the hole.

7. An electrically erasable and programmable nonvolatile semiconductor memory device according to claim 6 ; wherein the thickness of the second tunnel insulating film is thick enough to inhibit a generation of tunneling phenomenon even at a maximum electric field applied between the drain region and the floating gate electrode.

8. An electrically erasable and programmable nonvolatile semiconductor memory device according to claim 6 ; wherein an entire region along a side wall of the hole is occupied by the second conductivity-type high impurity concentration region; and wherein the tunnel region of the drain region along the hole is only formed on a bottom region of the hole.

9. An electrically erasable and programmable nonvolatile semiconductor memory device according to claim 6 ; wherein at least one of the tunnel insulating film and the control insulating film is a composite film of a silicon oxide film and a silicon nitride film.