IP Library Granted Patent US 9,189,989
Granted Patent B2
US 9,189,989 · App. 13/393,349 · Granted Nov 17, 2015

Integrated circuit for use in plasma display panel, access control method, and plasma display system

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Quick Facts
Patent No.
US 9,189,989
App. No.
13/393,349
Granted
Nov 17, 2015
Kind
B2
Abstract

A plasma display system restricts peak data traffic when a shared memory is used. In the plasma display system, a control unit prohibits a moving picture decoder from accessing a shared memory while an SF reading unit is reading, from the shared memory, SF pixel data which is information about respective cells to be lit in a plurality of subfields. On the other hand, the control unit permits the moving picture decoder to access the shared memory while the SF reading unit is not reading the SF pixel data from the shared memory during a sustain discharge period.

Claims (39)

1. An integrated circuit for use in a plasma display panel, comprising:

a decoder that reads encoded moving picture data from a shared memory, decodes the encoded moving picture data to obtain decoded data, and stores the decoded data directly in the shared memory using a direct connection to the shared memory,

wherein the shared memory is shared by the decoder, a converter, a reader, and an access controller;

the converter reads the decoded data from the shared memory, converts the decoded data into subfield data, and stores the subfield data directly in the shared memory using a direct connection to the shared memory;

the reader reads the subfield data directly from the shared memory using a direct connection to the shared memory; and

the access controller:

(i) restricts access to the shared memory from the decoder during a first period in which a cell among plasma display panel cells is specified as a cell to be illuminated according to the subfield data; and

(ii) restricts access to the shared memory from the reader during a second period in which the specified cell is illuminated.

2. The integrated circuit of claim 1 , further comprising:

storage that stores at least one control table that defines the first period and the second period according to a total number of subfields included in one TV field of the moving picture data,

wherein the access controller restricts the access to the shared memory from the decoder and from the reader in accordance with the first period and the second period defined by the control table.

3. The integrated circuit of claim 2 , further comprising:

a setter that sets the total number of subfields to be included in one TV field of the moving picture data,

wherein the at least one control table comprises two or more control tables that define the first period and the second period individually for a plurality of possible total numbers of subfields, and

the access controller restricts the access to the shared memory from the decoder and from the reader by retrieving one of the two or more control tables in accordance with the total number of subfields that the setter has set.

4. The integrated circuit of claim 3 , wherein

the converter includes

a determiner that determines whether or not the subfield data has a predetermined data pattern, and

a notifier that notifies, when the determiner determines that the subfield data has the data pattern, the reader of the data pattern, and

when notified by the notifier of the data pattern, the reader specifies, from among the plasma display panel cells, a cell to be illuminated according to the data pattern instead of accessing the shared memory.

5. The integrated circuit of claim 1 , wherein

the access controller restricts the access to the shared memory from the decoder by prohibiting the decoder from accessing the shared memory.

6. The integrated circuit of claim 1 , wherein

the access controller restricts the access to the shared memory from the decoder by setting a maximum memory bandwidth that the decoder uses to access the shared memory during the first period to less than a maximum memory bandwidth that the decoder uses to access the shared memory during a period other than the first period.

7. A method for controlling an access to a shared memory in an integrated circuit for use in a plasma display, wherein the shared memory is shared by a moving picture decoder, a converter, and a reader included in the plasma display, the method comprising the steps of:

a decoding step, performed by the moving picture decoder, of reading the encoded moving picture data from the shared memory, converting the encoded moving picture data into decoded data, and storing the decoded data directly in the shared memory using a direct connection to the shared memory;

a conversion step, performed by the converter, of reading the decoded data from the shared memory, converting the decoded data into the subfield data, and storing the subfield data directly in the shared memory using a direct connection to the shared memory;

a reading step, performed by the reader, of reading the subfield data directly from the shared memory using a direct connection to the shared memory; and

a restriction step of:

(i) restricting access to the shared memory from the moving picture decoder during a first period in which a cell among plasma display panel cells is specified as a cell to be illuminated according to the subfield data; and

(ii) restricting access to the shared memory from the reader during a second period in which the specified cell is illuminated.

8. A plasma display system comprising:

a decoder that reads encoded moving picture data from a shared memory, decodes the encoded moving picture data to obtain decoded data, and stores the decoded data directly in the shared memory using a direct connection to the shared memory,

wherein the shared memory is shared by the decoder, a converter, a reader, and an access controller;

the converter reads the decoded data from the shared memory, converts the decoded data into subfield data, and stores the subfield data directly in the shared memory using a direct connection to the shared memory;

the reader reads the subfield data directly from the shared memory using a direct connection to the shared memory; and

the access controller:

(i) restricts access to the shared memory from the decoder during a first period in which a cell among plasma display panel cells is specified as a cell to be illuminated according to the subfield data; and

(ii) restricts access to the shared memory from the reader during a second period in which the specified cell is illuminated.

Assignments (2)
CORRECTIVE ASSIGNMENT TO CORRECT THE ERRONEOUSLY FILED APPLICATION NUMBERS 13/384239, 13/498734, 14/116681 AND 14/301144 PREVIOUSLY RECORDED ON REEL 034194 FRAME 0143. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Dec 24, 2020
From: PANASONIC CORPORATION
To: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
Reel/Frame 056788/0362 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 10, 2014
From: PANASONIC CORPORATION
To: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
Reel/Frame 034194/0143 →