IP Library Granted Patent US 9,284,187
Granted Patent B2
US 9,284,187 · App. 13/398,158 · Granted Mar 15, 2016

Integrated circuit with sensor and method of manufacturing such an integrated circuit

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Quick Facts
Patent No.
US 9,284,187
App. No.
13/398,158
Granted
Mar 15, 2016
Kind
B2
Abstract

Disclosed is an integrated circuit comprising a substrate ( 10 ) carrying a plurality of circuit elements; a metallization stack ( 12, 14, 16 ) interconnecting said circuit elements, said metallization stack comprising a patterned upper metallization layer comprising a first metal portion ( 20 ); a passivation stack ( 24, 26, 28 ) covering the metallization stack; and a sensor including a sensing material ( 40 ) on the passivation stack, said sensor being coupled to the first metal portion by a via ( 34 ) extending through the passivation stack. A method of manufacturing such an IC is also disclosed.

Claims (52)

1. An integrated circuit comprising:

a substrate carrying a plurality of circuit elements;

a metallization stack interconnecting the circuit elements, the metallization stack including a patterned upper metallization layer having a first metal portion;

a passivation stack covering the metallization stack, the passivation stack including a moisture-impenetrable layer and being configured and arranged to mitigate moisture penetration to the metallization stack and ensure operation of the circuit elements;

a sensor including a sensing material on the passivation stack, the sensing material being coupled to the first metal portion by a via extending through the passivation stack; and

a bond pad portion in the upper metallization layer,

wherein the sensor further includes two interdigitated electrodes insulated from one another by the sensing material, the sensing material being configured and arranged to absorb moisture and to exhibit a dielectric constant that changes based upon moisture absorbed by the sensing material, the sensor being configured and arranged to detect the absorbed moisture by sensing capacitance between the two interdigitated electrodes and via the sensing material.

2. The integrated circuit of claim 1 , wherein the sensor further includes an electrode on the passivation stack, the electrode being conductively coupled to the via, and further including a second moisture-impenetrable layer on the passivation stack to further mitigate moisture penetration to the metallization stack and ensure operation of the circuit elements.

3. The integrated circuit of claim 1 , wherein the via comprises tungsten, and further including a bond pad in the upper metallization layer, the bond pad being partially exposed by an opening in the passivation stack, and further including a moisture-impenetrable guard ring, surrounding the opening, configured and arranged to mitigate moisture penetration to the metallization stack.

4. The integrated circuit of claim 1 , wherein the passivation stack includes an opening at least partially exposing the bond pad portion.

5. The integrated circuit of claim 4 , wherein the passivation stack further includes a moisture-impenetrable guard ring surrounding the opening, the guard ring extending onto the bond pad portion.

6. The integrated circuit of claim 1 , further including a bond pad on the passivation stack, the bond pad being conductively coupled to the bond pad portion by a further via extending through the passivation stack.

7. The integrated circuit of claim 2 , wherein the sensor further includes another electrode on the passivation stack, wherein the upper metallization layer includes a second metal portion conductively coupled to the other electrode by a second via extending through the passivation layer, the first electrode and the other electrode being electrically insulated from each other by the sensing material, and wherein the sensing material has a variable dielectric constant as a function of relative humidity.

8. The integrated circuit of claim 2 , wherein the passivation stack includes a Ta 2 0 5 layer, the sensing material being formed on the Ta 2 0 5 layer.

9. The integrated circuit of claim 1 , wherein the passivation stack and the via provide a contiguous moisture barrier over the first metal portion that prevents moisture from contacting the first metal portion upon exposure of the sensor to moisture.

10. The integrated circuit of claim 1 , wherein the passivation stack includes a barrier ring extending around the via and configured and arranged to prevent moisture from passing through the barrier ring.

11. A method of manufacturing an integrated circuit, comprising:

providing a substrate carrying a plurality of circuit elements;

forming a metallization stack interconnecting the circuit elements, the metallization stack including a patterned upper metallization layer having a first metal portion;

forming a passivation stack covering the metallization stack, the passivation stack being configured and arranged to mitigate moisture penetration to the metallization stack and ensure operation of the circuit elements;

forming a trench in the passivation stack to expose the first metal portion;

forming a via in the trench; and

forming a sensor including a sensing material on the passivation stack over the via to couple the sensing material to the first metal portion,

wherein the step of forming the passivation stack further includes forming a bond pad portion in the upper metallization layer, and

wherein the step of forming the sensor further includes forming of two interdigitated electrodes insulated from one another by the sensing material, the sensing material being configured and arranged to absorb moisture and to exhibit a dielectric constant that changes based upon moisture absorbed by the sensing material, the sensor being configured and arranged to detect the absorbed moisture by sensing capacitance between the two interdigitated electrodes and via the sensing material.

12. The method of claim 11 , wherein the step of forming the sensor includes forming a first electrode on the passivation stack, wherein the first electrode is conductively coupled to the via, and further including forming a second moisture-impenetrable layer, configured and arranged to further mitigate moisture penetration to the metallization stack and ensure operation of the circuit elements, on the passivation stack.

13. The method of claim 12 , wherein:

the patterned upper metallization layer comprises a second metal portion;

the step of forming the trench further comprises forming a further trench exposing the second metal portion;

the step of forming the via further includes forming a second via in the further trench; and

the step of forming the sensor further includes forming a second electrode on the passivation stack electrically insulated from the first electrode by the sensing material, wherein the second electrode is conductively coupled to the second via.

14. The method of claim 11 , wherein the upper metallization layer further includes a bond pad portion, and wherein the method further includes forming an opening in the passivation stack at least partially exposing the bond pad portion.

15. The method of claim 14 , further including forming a moisture-impenetrable guard ring in the passivation stack around the opening, the guard ring extending from an upper surface of the passivation stack, through the passivation stack and onto the bond pad portion, the guard ring being configured and arranged to prevent moisture from passing laterally from the opening into regions of the passivation stack laterally adjacent the guard ring.

16. The method of claim 14 , further including forming a further via in the opening and forming a bond pad on the passivation stack that is conductively coupled to the further via.

17. The method of claim 11 , wherein forming the passivation stack, forming the trench and forming the via includes forming a contiguous moisture barrier over the first metal portion that prevents moisture from contacting the first metal portion upon exposure of the sensor to moisture.

18. An integrated circuit comprising:

a substrate carrying a plurality of circuit elements;

a metallization stack interconnecting the circuit elements, the metallization stack including a patterned upper metallization layer having a first metal portion;

a passivation stack covering the metallization stack, the passivation stack including a moisture-impenetrable layer and being configured and arranged to mitigate moisture penetration to the metallization stack and ensure operation of the circuit elements;

a sensor including a sensing material on the passivation stack, the sensing material being coupled to the first metal portion by a via extending through the passivation stack; and

a bond pad on the upper metallization layer,

wherein the passivation stack has an opening therein defined by sidewalls of material in the passivation stack and extending from an upper surface of the passivation stack to the bond pad, therein exposing the bond pad without exposing the upper metallization layer.

19. The integrated circuit of claim 18 , further including a barrier ring extending through the passivation layer to the bond pad and around the opening, the barrier ring being configured and arranged to prevent moisture from passing laterally from the opening into regions of the passivation layer laterally adjacent the barrier ring.

20. A method of manufacturing an integrated circuit, comprising:

providing a substrate carrying a plurality of circuit elements;

forming a metallization stack interconnecting the circuit elements, the metallization stack including a patterned upper metallization layer having a first metal portion;

forming a passivation stack covering the metallization stack, the passivation stack being configured and arranged to mitigate moisture penetration to the metallization stack and ensure operation of the circuit elements;

forming a trench in the passivation stack to expose the first metal portion;

forming a via in the trench; and

forming a sensor including a sensing material on the passivation stack over the via to couple the sensing material to the first metal portion,

wherein the step of forming the passivation stack further includes forming a bond pad portion on the upper metallization layer, and

wherein the step of forming the passivation stack further includes forming an opening in the passivation stack, the opening defined by sidewalls of material in the passivation stack and extending from an upper surface of the passivation stack to the bond pad, therein exposing the bond pad without exposing the upper metallization layer.

Assignments (13)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2020
From: AMS AG; AMS INTERNATIONAL AG; AMS SENSORS UK LIMITED; AMS SENSORS GERMANY GMBH
To: SCIOSENSE B.V.
Reel/Frame 052769/0820 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
PATENT RELEASE Recorded Aug 17, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 039707/0471 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038017/0058 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 1, 2015
From: DAAMEN, ROEL; WOLTERS, ROBERTUS; RONGEN, RENE; PONOMAREV, YOURI VICTOROVITCH
To: NXP B.V.
Reel/Frame 036471/0832 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 7, 2015
From: NXP B.V.
To: AMS INTERNATIONAL AG
Reel/Frame 036015/0613 →