IP Library Granted Patent US 8,594,168
Granted Patent B2
US 8,594,168 · App. 13/408,011 · Granted Nov 26, 2013

Digital signal processor with adjustable data rate and methods thereof

Inventors: Gary Cheng (Markham, CA); Vyacheslav Shyshkin (Etobicoke, CA); Steve Selby (Scarborough, CA)
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Quick Facts
Patent No.
US 8,594,168
App. No.
13/408,011
Granted
Nov 26, 2013
Kind
B2
Abstract

As a digitized representation of an intermediate frequency television signal moves through a demodulator it undergoes a number of processes, including conversion from an analog signal to a digitized data, digital signal processing of the digitized data, and the like. The rate at which the digitized data moves through the digital signal processor of the demodulator for processing is referred to as the data rate of the DSP. The demodulator can vary the data rate based on a selected television channel, thereby reducing the level of interference at the demodulator resulting from noise.

Claims (22)

1. A method, performed by a data rate selection module, of reducing noise in a multimedia system, where the data rate selection module is coupled to a resampling module configured to resample an intermediate frequency (IF) signal demodulated from a radio frequency (RF) signal at a selected channel indicated by a channel selection signal which indicates a selected channel, where a digital IF signal is output from an analog-to-digital (A/D) converter at an initial sampling rate and with the data rate selection module coupled to a digital signal processor (DSP) where the DSP is designed to operate at maximum efficiency at a first data rate, the method comprising:

receiving data rate adjustment information based on the channel selection signal, where the data rate adjustment signal indicates a second data rate, where the second data rate is different from the first data rate only if operation of the DSP at the first data rate causes high noise in the multimedia system when tuned to the selected channel and if operation of the DSP at the second data rate reduces noise in the multimedia system when tuned to the selected channel;

adjusting the initial sampling rate to the second data rate; and

controlling the DSP to operate at the second data rate.

2. The method of claim 1 where adjusting the initial sampling rate further comprises:

decimating the digital IF signal to adjust the initial sampling rate to the second data rate.

3. The method of claim 1 where adjusting the initial sampling rate further comprises:

discarding samples when filtering the digital IF signal to adjust the initial sampling rate to the second data rate.

4. The method of claim 1 where receiving data rate adjustment information further comprises:

receiving information from a look up table storing second data rates associated with selected channels.

5. A device, comprising:

an analog-to-digital (A/D) converter to convert a received analog intermediate frequency (IF) signal to a first set of samples at a first sampling rate, the first set of samples representing a digital IF signal and with the analog IF signal modulated from a radio frequency (RF) signal at a selected channel indicated by a channel selection signal;

a digital signal processor (DSP) configured to operate at maximum efficiency at a first data rate; and

a resampling module having a signal input coupled to an output of the A/D converter, a control input to receive information indicative of a second data rate based on the channel selection, and an output coupled to the DSP, where the second data rate is different from the first data rate only if operation of the DSP at the first data rate causes high noise in the multimedia system when tuned to the selected channel and if operation of the DSP at the second data rate reduces noise in the multimedia system when tuned to the selected channel, and with the resampling module configured to adjust the initial sampling rate to the second data rate and configured to control the DSP to operate at the second data rate.

6. The device of claim 5 further comprising:

a lookup table coupled to the channel selection module, the lookup table configured to provide the information indicative of a second data rate based on the channel selection.

7. The device of claim 5 with the resampling module further comprising:

a decimation module configured to decimate the digital IF signal to adjust the initial sampling rate to the second data rate.

8. The device of claim 5 with the resampling module further comprising:

a polyphase filter configured to discard samples when filtering the digital IF signal to adjust the initial sampling rate to the second data rate;

receiving an intermediate frequency (IF) signal associated with a first selected channel; and

changing a data rate of the IF signal associated with the first selected channel at a selected data rate, the selected data rate based on the selected channel.

Assignments (7)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 5, 2025
From: SPECTRA7 MICROSYSTEMS CORP.
To: PARADE TECHNOLOGIES, LTD.
Reel/Frame 071332/0014 →
CHANGE OF NAME Recorded Mar 21, 2025
From: FRESCO MICROCHIP INC.
To: SPECTRA7 MICROSYSTEMS CORP.
Reel/Frame 070588/0680 →
RELEASE OF SECURITY INTEREST Recorded Dec 7, 2018
From: SPECTRA 7 MICROSYSTEMS (IRELAND) LIMITED; SPECTRA7 MICROSYSTEMS CORP., AS SUCCESSOR IN INTEREST TO FRESCO MICROCHIP INC.; SPECTRA7 MICROSYSTEMS LTD.
To: MIDCAP FINANCIAL TRUST, AS AGENT
Reel/Frame 047742/0404 →
SECURITY INTEREST Recorded Apr 5, 2016
From: SPECTRA7 MICROSYSTEMS CORP., AS SUCCESSOR IN INTEREST TO FRESCO MICROCHIP INC.
To: MIDCAP FINANCIAL TRUST, AS AGENT
Reel/Frame 038358/0898 →
RELEASE OF SECURITY INTEREST Recorded Apr 4, 2016
From: COMERICA BANK, A TEXAS BANKING ASSOCIATION AND AUTHORIZED FOREIGN BANK UNDER THE BANK ACT (CANADA)
To: SPECTRA7 MICROSYSTEMS CORP., AS SUCCESSOR IN INTEREST TO FRESCO MICROCHIP INC.
Reel/Frame 038182/0279 →
SECURITY AGREEMENT Recorded Feb 22, 2013
From: FRESCO MICROCHIP INC.
To: COMERICA BANK, A TEXAS BANKING ASSOCIATION AND AUTHORIZED FOREIGN BANK UNDER THE BANK ACT (CANADA)
Reel/Frame 029854/0654 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 29, 2012
From: CHENG, GARY; SHYSHKIN, VYACHESLAV; SELBY, STEVE
To: FRESCO MICROCHIP INC.
Reel/Frame 027784/0616 →
Continuity (1)
Related Publication 20130223572A1 · Aug 29, 2013