Data-holding circuit and substrate for a display device
View Patent ↗A display device has a data-holding circuit with a capacitance and a display portion with a plurality of pixel electrodes, formed on a first carrier substrate. In the display device, a second carrier substrate disposed opposite the first carrier substrate is placed above the display portion, but the opposing substrate is not present above the area in which the data-holding circuit is disposed. The parasitic capacitance of the data-holding circuit can thereby be reduced. Therefore, the capacitance in the data-holding circuit can be reduced and the area required can be reduced as well. The display data of all the pixels is sent serially to the liquid crystal module without high-speed transfer for each frame time interval, and size can be reduced because the controller IC and interface circuit are formed on the same substrate as the display device substrate.
1. A display device comprising:
a data-holding circuit having a capacitance;
a display portion having a plurality of pixel electrodes;
a first carrier substrate on which the data-holding circuit and the display portion are formed;
a second carrier substrate that is disposed opposite to the first carrier substrate being placed above the display portion, an opposing substrate being absent above an area in which the data-holding circuit is disposed; and
a transmission control portion,
wherein the capacitance is provided with a sense amplifier circuit for amplifying and latching the magnitude of the electric potential between two bit lines;
wherein the sense amplifier circuit comprises a low-amplitude preamp circuit connected between the bit lines, and a full-swing amplifier circuit that is connected between the bit lines and that amplifies the magnitude of electric potential that is amplified by the low-amplitude preamp circuit;
the low-amplitude preamp circuit includes a plurality of MOS type transistors, the gate of a first MOS type transistor among the plurality of MOS type transistors connecting to a first bit line among the bit lines, and the gate of a second MOS type transistor among the plurality of MOS type transistors connecting to a second bit line among the bit lines;
wherein the transmission control portion is configured to control a first connection that connects the gate of the first MOS type transistor with the first bit line and a second connection that connects the gate of the second MOS type transistor with the second bit line, disconnect the first connection and the second connection before the full-swing amplifier circuit operates, and disconnect signal transmission between the low-amplitude preamp circuit and the full-swing amplifier circuit.
2. The display device according to claim 1 , further comprising a storage capacitor and a pixel,
wherein a dielectric body of the data-holding circuit which constitutes the capacitance in the data-holding circuit and a dielectric body of the storage capacitor provided in the pixel are formed with the same film.
3. The display device according to claim 1 , comprising:
a drive circuit for driving the display portion being disposed on the first carrier substrate on which the data-holding circuit and the display portion are disposed.
4. The display device according to claim 3 , further comprising a storage capacitor, a pixel and a transistor constituting the drive circuit, wherein
a dielectric body of the data-holding circuit which constitutes the capacitance within the data-holding circuit and a dielectric body of the storage capacitor provided in the pixel are formed with the same film as at least one of gate oxide films of the transistor constituting the drive circuit.