Ground fault circuit interrupter (GFCI) monitor
View Patent ↗This document discusses, among other things, a self-test (ST) ground fault circuit interrupter (GFCI) monitor configured to generate a simulated ground fault starting in a first half-cycle of a first cycle of AC power and extending into a second half-cycle of the first cycle of AC power, wherein the first half-cycle of the first cycle of AC power precedes the second half-cycle of the first cycle of AC power. Further, the ST GFCI monitor can detect a response to the simulated ground fault.
1. A system, comprising:
a self-test (ST) ground fault circuit interrupter (GFCI) monitor configured to generate simulated ground fault, starting in a first half-cycle of a first cycle of AC power and extending into a second half-cycle of the first cycle of AC power, and to detect a response to the simulated ground fault,
wherein the first half-cycle of the first cycle of AC power precedes the second half-cycle of the first cycle of AC power, and
wherein the ST GFCI monitor is configured to trigger the simulated ground fault using a voltage on a solenoid coupled to the ST GFCI monitor.
2. The system of claim 1 , wherein the ST GFCI monitor is configured to generate the simulated ground fault to test functionality of a semiconductor switch without interrupting AC power to a load, the semiconductor switch configured to control coupling or decoupling of the AC power and the load.
3. The system of claim 2 , wherein the semiconductor switch includes a silicon-controlled rectifier (SCR), and
wherein the ST GFCI monitor is configured to detect if the SCR is enabled in response to the simulated ground fault.
4. The system of claim 3 , wherein the ST GFCI monitor is configured to generate an end-of-life (EOL) signal if the SCR is not enabled in response to the simulated ground fault.
5. The system of claim 2 , including:
load contacts;
a solenoid configured to open or close the load contacts, wherein closed load contacts are configured to couple the AC power and the load and open load contacts are configured to decouple the AC power and the load; and
the semiconductor switch, including a silicon-controlled rectifier (SCR) configured to control the solenoid.
6. The system of claim 5 , including:
a diode configured to prevent the solenoid from opening the load contacts during the second half-cycle of the first cycle of AC power,
wherein the ST GFCI monitor is coupled to the SCR and to the diode,
wherein the diode is coupled to the SCR, to the ST GFCI monitor, and to the solenoid,
wherein the solenoid is coupled to the diode and to the load contacts, and
wherein the SCR is configured to control current through the solenoid.
7. The system of claim 1 , wherein the ST GFCI monitor includes a comparator configured to compare an anode voltage of a silicon-controlled rectifier (SCR) to a threshold voltage during the first half-cycle of AC power, the SCR configured to control a solenoid, and
wherein the ST GFCI monitor is configured to detect an open circuit or high impedance condition during the first half-cycle of AC power using the comparison of the anode voltage of the SCR to the threshold voltage.
8. The system of claim 7 , wherein the threshold voltage includes a voltage in a range of 60 Volts RMS through 105 Volts RMS.
9. The system of claim 7 , wherein the ST GFCI monitor is configured to generate an end-of-life (EOL) signal if the anode voltage of the SCR is less than the threshold voltage.
10. The system of claim 9 , wherein the ST GFCI monitor is configured to detect a manual self-test and to reset the ST GFCI monitor if a manual self-test is detected.
11. The system of claim 1 , wherein the first half-cycle of AC power includes a positive half-cycle of AC power, and wherein the second half-cycle of AC power includes a negative half-cycle of AC power.
12. The system of claim 1 , wherein the first half-cycle of AC power includes a negative half-cycle of AC power, and wherein the second half-cycle of AC power includes a positive half-cycle of AC power.
13. The system of claim 1 , wherein the ST GFCI monitor is configured to generate the simulated ground fault to test functionality of a silicon-controlled rectifier (SCR) without interrupting AC power to a load, to bias the SCR during the second half-cycle of the first cycle of AC power, and to detect if the SCR is enabled in response to the simulated ground fault to test functionality of the SCR.
14. The system of claim 1 , including:
a GFCI controller coupled to the ST GFCI monitor and configured to detect a ground fault using a sense coil and to provide an enable signal to a semiconductor switch in response to the detected ground fault, the semiconductor switch configured to interrupt AC power to a load in response to the detected ground fault.
15. The system of claim 14 , wherein the semiconductor switch includes a silicon-controlled rectifier (SCR), and
wherein the GFCI controller is configured to enable the SCR to interrupt AC power to the load in response to the detected ground fault.
16. The system of claim 1 , wherein the ST GFCI monitor is configured to automatically generate the simulated ground fault at a periodic interval.
17. The system of claim 1 , wherein the ST GFCI monitor is configured to automatically generate the simulated ground fault a first period of time following at least one of power-on or reset of the ST GFCI monitor and at a periodic interval following the first simulated fault.
18. The system of claim 1 , including:
a first integrated circuit including the ST GFCI monitor; and
a second integrated circuit including a GFCI controller configured to detect a ground fault and to provide an enable signal to a semiconductor switch in response to the detected ground fault, the semiconductor switch configured to interrupt AC power to a load in response to the detected ground fault.
19. The system of claim 1 , wherein the ST GFCI circuit includes a comparator configured to receive a representation of the voltage on the solenoid, and
wherein the ST GFCI circuit is configured to trigger the simulated ground fault using an output of the comparator.
20. A method, comprising:
generating a simulated ground fault, using a self-test (ST) ground fault circuit interrupter (GFCI) monitor, starting in a first half-cycle of a first cycle of AC power and extending into a second half-cycle of the first cycle of AC power; and
detecting a response to the simulated ground fault,
wherein the first half-cycle of the first cycle of AC power precedes the second half-cycle of the first cycle of AC power, and
triggering, using the ST GFCI monitor, the simulated ground fault using a voltage on a solenoid coupled to the ST GFCI monitor.
21. The method of claim 20 , including:
selectively coupling or decoupling AC power to a load using a semiconductor switch; and
testing functionality of the semiconductor switch using the simulated ground fault without interrupting AC power to the load.
22. The method of claim 21 , including:
detecting if the semiconductor switch is enabled in response to the simulated ground fault,
wherein the semiconductor switch includes a silicon-controlled rectifier (SCR).
23. The method of claim 22 , including:
generating an end-of-life (EOL) signal if the SCR is not enabled in response to the simulated ground fault.
24. The method of claim 20 , including:
comparing an anode voltage of a silicon-controlled rectifier (SCR) to a threshold voltage during the first half-cycle of AC power; and
detecting an open circuit or high impedance condition during the first half-cycle of AC power using the comparing the anode voltage to the threshold voltage.
25. The method of claim 24 , including:
generating an end-of-life (EOL) signal if the anode voltage of the SCR is less than the threshold voltage.
26. The method of claim 25 , including:
detecting a manual self-test; and
resetting the ST GFCI if a manual self-test is detected.
27. The method of claim 20 , wherein the first half-cycle of AC power includes a positive half-cycle of AC power, and wherein the second half-cycle of AC power includes a negative half-cycle of AC power.
28. The method of claim 20 , wherein the first half-cycle of AC power includes a negative half-cycle of AC power, and wherein the second half-cycle of AC power includes a positive half-cycle of AC power.
29. The method of claim 20 , including:
testing functionality of a silicon-controlled rectifier (SCR) without interrupting AC power to a load, including:
biasing the SCR during the second half-cycle of the first cycle of AC power; and
detecting if the SCR is enabled in response to the simulated ground fault.
30. The method of claim 20 , including:
detecting a ground fault using a sense coil; and
providing an enable signal to a semiconductor switch in response to the detected ground fault, the semiconductor switch configured to interrupt AC power to a load in response to the detected ground fault.
31. The method of claim 30 , including:
enabling the semiconductor switch to interrupt AC power to the load in response to the detecting the ground fault.
32. The method of claim 20 , wherein the generating the simulated ground fault includes automatically generating the simulated ground fault at a periodic interval.
33. The method of claim 20 , wherein the generating the simulated ground fault includes automatically generating the simulated ground fault a first period of time following at least one of power-on or reset of the ST GFCI monitor and at a periodic interval following the first simulated fault.
34. A system, comprising:
load contacts;
a solenoid configured to open or close the load contacts, wherein closed load contacts are configured to couple AC power and a load and open load contacts are configured to decouple the AC power and the load;
a silicon-controlled rectifier (SCR) configured to control the solenoid;
a self-test (ST) ground fault circuit interrupter (GFCI) monitor configured to automatically generate a simulated ground fault, starting in a first half-cycle of a first cycle of AC power and extending into a second half-cycle of the first cycle of AC power, to test functionality of the SCR at a first period of time following at least one of power-on or reset of the ST GFCI monitor and at a periodic interval following the first simulated fault a periodic interval without interrupting AC power to the load, and to generate an end-of-life (EOL) signal if the SCR is not enabled in response to the simulated ground fault;
a diode configured to prevent the solenoid from opening the load contacts during the second half-cycle of the first cycle of AC power; and
a GFCI controller configured to detect a ground fault using a sense coil and to provide an enable signal to the SCR in response to the detected ground fault,
wherein the ST GFCI monitor includes a comparator configured to compare an anode voltage of a silicon-controlled rectifier (SCR) to a threshold voltage to detect an open circuit or high impedance condition during the first half-cycle of AC power,
wherein the ST GFCI monitor is configured to generate the EOL signal if the anode voltage of the SCR is less than the threshold voltage,
wherein the threshold voltage includes a voltage in a range of 60 Volts RMS through 105 Volts RMS,
wherein the first half-cycle of the first cycle of AC power precedes the second half-cycle of the first cycle of AC power, and
wherein the ST GFCI monitor is configured to detect a manual self-test and to reset the ST GFCI monitor if a manual self-test is detected.
35. The system of claim 34 , wherein the first half-cycle of AC power includes a positive half-cycle of AC power, and wherein the second half-cycle of AC power includes a negative half-cycle of AC power.