Semiconductor device and method of forming the same

1. A semiconductor device comprising:

a semiconductor substrate having a groove and an active region adjacent to the groove;

a gate electrode in the groove; and

a capacitor contact including a first portion and a second portion over the first portion, the second portion having a second central axis which is horizontally shifted from a first central axis of the first portion, the first portion and the second portion being made of an identically same conductive film so that the capacitor contact is free from an interface between the first and second portions the first portion having a bottom surface that is in contact with an upper surface of the active region.

2. The semiconductor device according to claim 1 , wherein the bottom surface is in contact directly with the entire of the upper surface of the active region.

3. The semiconductor device according to claim 1 , further comprising:

a cap insulator in the groove and over the gate electrode, the cap insulator being adjacent to the upper surface of the active region.

4. The semiconductor device according to claim 3 , wherein the first portion comprises a horizontally expanded portion and the second portion comprises a pillar portion which extends vertically from the horizontally expanded portion.

5. The semiconductor device according to claim 3 , further comprising:

an isolation region in the semiconductor substrate, the isolation region and the cap insulator defining the upper surface of the active region, and the groove extending over the isolation region and the active region.

6. The semiconductor device according to claim 1 , further comprising:

a first insulator over the substrate; and

a first bit line over the first insulator.

7. The semiconductor device according to claim 4 , wherein the pillar portion has a bottom portion which partially overlaps an upper portion of the horizontally expanded portion in plan view.

8. The semiconductor device according to claim 1 , further comprising:

a first bit line over the substrate; and

a cover insulator which covers the first bit line;

wherein the capacitor contact has an upper surface which is lower than an upper surface of the cover insulator.

9. The semiconductor device according to claim 4 , further comprising:

an insulating film of a same material, which covers all surfaces of the capacitor contact, except for the upper surface of the pillar portion and the bottom surface of the horizontally expanded portion.

10. The semiconductor device according to claim 1 , further comprising:

an isolation region in the semiconductor substrate, the isolation region defining the active region, and the groove extending over the isolation region and the active region;

a first bit line over the substrate;

a cover insulator which covers the first bit line; and

a first insulating film which covers all surfaces of the capacitor contact, except for the upper surface of the pillar portion and the bottom surface of the horizontally expanded portion,

wherein the isolation region, the cover insulator and the first insulating film are made of a same insulating material.

11. The semiconductor device according to claim 10 , further comprising:

a second insulating film of the same insulating material, which covers upper, side and bottom surfaces of the first bit line.

12. The semiconductor device according to claim 10 , wherein the same insulating material is silicon nitride.

13. The semiconductor device according to claim 1 , wherein the conductive film is doped polysilicon film.

14. The semiconductor device according to claim 4 , wherein the pillar portion has a rectangle shape in horizontal cross section.

15. The semiconductor device according to claim 4 , wherein the pillar portion has a lower portion which partially penetrates an insulator formed over the semiconductor substrate.

16. The semiconductor device according to claim 4 , wherein the horizontally expanded portion is disposed between the active region and an insulator formed over the semiconductor substrate.

17. The semiconductor device according to claim 10 , wherein the horizontally expanded portion has an upper surface that is substantially the same level as an upper surface of the isolation region.

18. The semiconductor device according to claim 4 , wherein the horizontally expanded portion has a thickness that is substantially the same as a height of an upper surface of the isolation region from an upper surface of the semiconductor substrate.

19. A semiconductor device comprising:

a semiconductor substrate having isolation regions and active regions defined by the isolation regions, the semiconductor substrate having grooves, each of the grooves extending over the isolation region and the active region adjacent to the isolation region;

gate electrodes on bottoms of the grooves;

cap insulators burying the grooves, the cap insulators being disposed over the gate electrodes;

an insulator over the semiconductor substrate;

bit lines over the insulator; and

capacitor contacts which penetrate the insulator, each of the capacitor contacts comprising: a pillar portion extending vertically from a surface of the semiconductor substrate and a horizontally expanding portion which extends in a horizontal direction parallel to the surface of the semiconductor substrate, the horizontally expanding portion having a bottom surface that is in contact directly with the entire of an upper surface of the active region, the pillar portion having a second central axis which is horizontally shifted from a first central axis of the horizontally expanding portion, the pillar portion and the horizontally expanding portion being made of an identically same conductive film so that each of the capacitor contacts is free from an interface between the first and second portions, the upper surface of the active region being defined by the isolation region and the cap insulator.

20. A semiconductor device comprising:

a semiconductor substrate having an isolation region, an active region and the groove, the groove extending over the isolation region and the active region;

a buried gate electrode in the groove;

a cap insulator in the groove and over the buried gate electrode; and

a capacitor contact including a first portion and a second portion over the first portion, the second portion having a second central axis which is horizontally shifted from a first central axis of the first portion, the first portion and the second portion being made of an identically same conductive film so that the capacitor contact is free from an interface between the first and second portions, the first portion having a bottom surface that is in contact with an upper surface of the active region, and the upper surface of the active region being defined by the isolation region and the cap insulator.