Digital circuit arrangements for ambient noise-reduction
View Patent ↗A digital circuit arrangement for an ambient noise-reduction system affording a higher degree of noise reduction than has hitherto been possible. The arrangement converts the analog signals into N-bit digital signals at sample rate f 0 , and then subjects the converted signals to digital filtering. The value of N in some embodiments is 1 but, in any event, is no greater than 8, and f 0 may be 64 times the Nyquist sampling rate but, in any event, is substantially greater than the Nyquist sampling rate. This permits digital processing to be used without incurring group delay problems that rule out the use of conventional digital processing in this context. Furthermore, adjustment of the group delay can readily be achieved, in units of a fraction of a micro-second, providing the ability to fine tune the group delay for feed forward applications.
1. A signal processing circuit, comprising:
a feedforward circuit arrangement for receiving analog electrical signals indicative of ambient noise and for performing a filtering operation upon said analog signals to generate an analog noise cancellation signal, wherein the feedforward digital circuit arrangement comprises:
an analog-to-digital converter for converting said analog signals into N-bit digital signals at sample rate f0, where N is no greater than 8 and f0 is substantially greater than the Nyquist sampling rate;
a digital filter for receiving the N-bit digital signals and for generating filtered X-bit digital signals, where X is greater than N;
a digital modulator for receiving the filtered X-bit digital signals and generating modulated N-bit digital signals; and
a digital-to-analog converter for receiving the modulated N-bit digital signals and generating the analog noise cancellation signal.
2. A signal processing circuit as claimed in claim 1 , comprising a delay circuit for imparting an adjustable delay to the digital signal.
3. A signal processing circuit as claimed in claim 1 , wherein the digital filter incorporates a high-pass filter.
4. A signal processing circuit as claimed in claim 1 , wherein the digital filter incorporates a filter adapted to roll off a noise cancelling effect at higher audio frequencies.
5. A signal processing circuit as claimed in claim 1 , wherein the digital filter comprises a plurality of filters.
6. A signal processing circuit as claimed in claim 1 , adapted to permit adjustment of the degree of noise reduction.
7. A signal processing circuit, comprising:
a feedforward circuit arrangement for receiving analog electrical signals indicative of ambient noise and for performing a filtering operation upon said analog signals to generate an analog noise cancellation signal, wherein the feedforward circuit arrangement comprises:
an analog-to-digital converter for converting said analog signals into N-bit digital signals at sample rate f0, where N is no greater than 8;
a digital processor for receiving the N-bit digital signals and for generating filtered N-bit digital signals, wherein the digital processor has a group delay that depends on a clock cycle period and hence the sample rate of the N-bit digital signals; and
a digital-to-analog converter for receiving the filtered N-bit digital signals and generating the analog noise cancellation signal,
wherein the sample rate f0 is set to a value substantially greater than the Nyquist sampling rate required for sampling audio signals, such that the group delay of the digital processor is less than a target delay.
8. A signal processing circuit as claimed in claim 7 , wherein N is no greater than 5.
9. A signal processing circuit as claimed in claim 7 , wherein the target delay is less than or equal to 40 microseconds.