IP Library Granted Patent US 8,702,998
Granted Patent B1
US 8,702,998 · App. 13/416,992 · Granted Apr 22, 2014

Method to manufacture a flexible cable for a disk drive

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Quick Facts
Patent No.
US 8,702,998
App. No.
13/416,992
Granted
Apr 22, 2014
Kind
B1
Abstract

A novel method to manufacture a flexible cable for a disk drive is disclosed. The method includes providing a flexible laminar sheet. The flexible laminar sheet has a dielectric substrate layer and an electrically conductive layer contacting a first side of the dielectric substrate layer. A portion of the electrically conductive layer is etched away to define a first plurality of electrically conductive traces and to expose an etched surface of the first side of the dielectric substrate layer. A second plurality of electrically conductive traces is deposited on the etched surface of the first side of the dielectric substrate layer.

Claims (18)

1. A method to manufacture a flexible cable for a disk drive, the method comprising:

providing a flexible laminar sheet having a dielectric substrate layer and an electrically conductive layer contacting a first side of the dielectric substrate layer;

etching away a portion of the electrically conductive layer to define a first plurality of electrically conductive traces and to expose an etched surface of the first side of the dielectric substrate layer; and

depositing a second plurality of electrically conductive traces on the etched surface of the first side of the dielectric substrate layer.

2. The method of claim 1 wherein the electrically conductive layer comprises copper having a thickness in the range 10 microns to 20 microns.

3. The method of claim 1 wherein etching away the portion of the electrically conductive layer comprises depositing and patterning a photoresist layer on the electrically conductive layer, and then immersing the flexible laminar sheet in an acid bath.

4. The method of claim 3 further comprising removing the photoresist layer.

5. The method of claim 1 wherein depositing the second plurality of electrically conductive traces on the etched surface of the first side of the dielectric substrate layer comprises sputtering and patterning an electrically conductive seed layer on the etched surface of the first side of the dielectric substrate layer, and then electroplating an electrically conductive metal on the electrically conductive seed layer.

6. The method of claim 5 wherein the electrically conductive metal comprises copper.

7. The method of claim 1 further comprising laminating a patterned insulative cover layer in contact with the first and second pluralities of electrically conductive traces.

8. The method of claim 7 wherein laminating the patterned insulative cover layer in contact with the first and second pluralities of electrically conductive traces comprises heating the patterned insulative cover layer.

9. The method of claim 1 further comprising bonding an integrated circuit (IC) chip to the first plurality of electrically conductive traces.

10. The method of claim 9 wherein the IC chip is further bonded to the second plurality of electrically conductive traces.

11. The method of claim 9 wherein the IC chip is a preamplifier chip.

12. The method of claim 1 wherein the first plurality of electrically conductive traces extends away from the IC chip further than does the second plurality of electrically conductive traces.

13. The method of claim 1 wherein each of the first plurality of electrically conductive traces is separated from another of the first plurality of electrically conductive traces by no less than 35 microns, and at least one of the second plurality of electrically conductive traces is spaced from another of the second plurality of electrically conductive traces by a minimum spacing that is less than 30 microns.

14. The method of claim 1 wherein the flexible laminar sheet comprises at least one additional layer in addition to the dielectric substrate layer and the electrically conductive layer.

15. The method of claim 14 wherein the at least one additional layer includes a metal layer contacting a second side of the dielectric substrate layer.

Assignments (7)
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 038744 FRAME 0481 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058982/0556 →
RELEASE OF SECURITY INTEREST Recorded Mar 5, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 045501/0714 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038722/0229 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038744/0281 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038744/0481 →