IP Library Granted Patent US 8,654,546
Granted Patent B2
US 8,654,546 · App. 13/425,422 · Granted Feb 18, 2014

Method and apparatus for controlling resonant power converter

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Quick Facts
Patent No.
US 8,654,546
App. No.
13/425,422
Granted
Feb 18, 2014
Kind
B2
Abstract

A control circuit of a resonant power converter is disclosed. The control circuit comprises a first transistor and a second transistor for switching a transformer and a resonant tank comprising a capacitor and an inductor. A controller is configured to receive a feedback signal correlated to the output of the power converter for generating a first switching signal and a second switching signal to drive the first transistor and the second transistor, respectively. A diode coupled to the first transistor and the resonant tank for detecting the state of the first transistor and generating a detection signal for the controller. The detection signal indicates if the transistors are in a zero voltage switching (ZVS) state. If the transistors are not in the ZVS state, the switching frequency of the transistors will be increased.

Claims (42)

1. A control circuit of a resonant power converter, comprising:

a first transistor and a second transistor for switching a transformer and a resonant tank;

a controller, correlated to an output of the resonant power converter, is configured to receive a feedback signal for generating a first switching signal and a second switching signal to drive the first transistor and the second transistor respectively;

a diode coupled to the first transistor for detecting the state of the first transistor and generating a detection signal for the controller corresponding to the state of the first transistor;

wherein the switching frequency of the first transistor and the second transistor is increased if a body diode of the first transistor is not conducted before the first switching signal turns on the first transistor.

2. The control circuit as claimed in claim 1 , wherein the detection signal is enabled if the body diode of the first transistor is not conducted before the first switching signal turns on the first transistor, and the switching frequency of the first transistor and the second transistor is clamped as a minimum value when the detection signal is enabled.

3. The control circuit as claimed in claim 1 , further comprises:

a resistor coupled to the controller to determine a minimum value of the switching frequency; and

another resistor coupled to the controller to determine a maximum value of the switching frequency.

4. The control circuit as claimed in claim 1 , further comprising a capacitor coupled to the controller for soft start.

5. The control circuit as claimed in claim 1 , wherein the controller further comprises:

an input circuit configured to receive the feedback signal and the detection signal for generating a control signal; and

an oscillator configured to receive the control signal for generating an oscillation signal;

wherein the oscillation signal is correlated to generate the first switching signal and the second switching signal.

6. The control circuit as claimed in claim 5 , wherein the input circuit comprises a sample-and-hold circuit to clamp the control signal under a maximum value when the detection signal is enabled.

7. The control circuit as claimed in claim 6 , in which the sample-and-hold circuit further comprises:

an analog-to-digital converter;

a register coupled to the analog-to digital converter;

a digital-to-analog converter coupled to the register.

8. A method for controlling a resonant power converter, which comprising:

receiving a feedback signal, correlated to an output of the resonant power converter;

generating a switching signal corresponding to the feedback signal;

switching on a transformer and a resonant tank through a transistor corresponding to the switching signal;

generating a detection signal indicating whether the body diode of the transistor is conducted or not before switching on the transformer and the resonant tank through the transistor;

changing the switching frequency of the transistor corresponding to the detection signal;

wherein the transistor is driven by the switching signal.

9. The method as claimed in claim 8 , wherein generating a detection signal comprises enabling the detection signal when the body diode of the transistor is not conducted before the switching signal turns on the transistor.

10. The method as claimed in claim 8 , wherein changing the switching frequency of the transistor corresponding to the detection signal comprises increasing the switching frequency when the detection signal is enabled.

11. The method as claimed in claim 8 , in which the detection signal is generated from a diode coupled to detect the state of the transistor.

12. The method as claimed in claim 8 , further comprises:

programming a minimum switching frequency and a maximum switching frequency; and

programming a soft start.

13. The method as claimed in claim 12 , wherein programming a minimum switching frequency and a maximum switching frequency comprises programming a minimum switching frequency and a maximum switching frequency through resistors, and programming a soft start comprises programming a soft start through a capacitor.

14. The method as claimed in claim 8 , wherein generating a switching signal comprising:

generating a control signal corresponding to the feedback signal and the detection signal;

generating an oscillation signal corresponding to the control signal;

wherein the oscillation signal is coupled to generate the switching signal.

15. The method as claimed in claim 14 , in which generating the control signal comprises clamping the control signal under a maximum value through a sample-and-hold circuit when the detection signal is enabled.

16. The method as claimed in claim 15 , in which the sample-hold circuit comprising:

an analog-to-digital converter;

a register coupled to the analog-to-digital converter; and

a digital-to-analog converter coupled to the register.

Assignments (5)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT RECORDED AT REEL 046410, FRAME 0933 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064072/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 22, 2018
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 046410/0933 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 25, 2017
From: FAIRCHILD (TAIWAN) CORPORATION (FORMERLY SYSTEM GENERAL CORPORATION)
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 042328/0318 →
CHANGE OF NAME Recorded May 2, 2016
From: SYSTEM GENERAL CORP.
To: FAIRCHILD (TAIWAN) CORPORATION
Reel/Frame 038594/0168 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 23, 2012
From: LIN, TIEN-CHI; CHOI, HANG-SEOK; YANG, TA-YUNG
To: SYSTEM GENERAL CORP.
Reel/Frame 027913/0907 →