IP Library Granted Patent US 8,871,608
Granted Patent B2
US 8,871,608 · App. 13/425,877 · Granted Oct 28, 2014

Method for fabricating backside-illuminated sensors

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Quick Facts
Patent No.
US 8,871,608
App. No.
13/425,877
Granted
Oct 28, 2014
Kind
B2
Abstract

A method for fabricating a backside-illuminated sensor includes providing a thin film semiconductor lamina having a first conductivity, and forming a doped region having a second conductivity within the lamina and at a front surface of the lamina. The lamina may be provided as a free-standing lamina, or may be provided as a semiconductor donor body from which the lamina is cleaved. An electrical connection is formed to the doped region. A temporary carrier is contacted to the back surface of the semiconductor and later removed. A backside-illuminated sensor is fabricated from the semiconductor lamina, in which the thickness of the semiconductor lamina remains substantially unchanged during the fabrication process.

Claims (45)

1. A method of fabricating a backside-illuminated sensor, the method comprising the steps of:

providing a thin film semiconductor lamina having a front surface, a back surface and a thickness between the front surface and the back surface, wherein the semiconductor lamina has a first conductivity,

the semiconductor lamina having a doped region formed within the semiconductor lamina at the front surface of the lamina, wherein the doped region has a second conductivity;

contacting a temporary carrier to the back surface of the semiconductor lamina;

forming an electrical connection to the doped region at the front side of the semiconductor lamina;

removing the temporary carrier from the back surface; and

fabricating a backside-illuminated sensor from the semiconductor lamina, wherein the thickness of the semiconductor lamina remains substantially unchanged during fabrication of the backside illuminated sensor.

2. The method of claim 1 wherein the step of providing the thin film semiconductor lamina further comprises:

providing a semiconductor donor body having a first surface, wherein the semiconductor donor body has the first conductivity;

implanting ions into the first surface of the semiconductor donor body to define a cleave plane; and

cleaving the semiconductor donor body at the cleave plane, wherein the cleave plane forms the back surface of the semiconductor lamina and wherein the first surface of the semiconductor donor body forms the front surface of the semiconductor lamina.

3. The method of claim 2 wherein the step of providing the thin film semiconductor lamina further comprises forming the doped region within the semiconductor lamina; and

wherein only the steps of implanting ions, cleaving the semiconductor donor body, and forming the doped region have processing temperatures above about 450 degrees Celsius.

4. The method of claim 3 wherein the step of forming the doped region occurs prior to the step of implanting ions.

5. The method of claim 2 wherein the step of implanting ions comprises an implant energy;

wherein the implant energy determines a depth of the cleave plane, the depth being measured from the first surface of the semiconductor donor body; and

wherein the depth is chosen to be substantially equivalent to the thickness of the semiconductor lamina.

6. The method of claim 1 wherein the step of forming the electrical connection comprises the steps of:

applying a metallization layer to the front side of the semiconductor lamina; and

coupling an integrated circuit to the metallization layer.

7. The method of claim 6 wherein the integrated circuit is a complementary metal-oxide semiconductor (CMOS).

8. The method of claim 1 further comprising the step of coupling a color filter to the back surface of the semiconductor lamina.

9. The method of claim 1 wherein the thickness of the thin film semiconductor lamina is less than about 25 microns.

10. The method of claim 1 wherein the thickness of the thin film semiconductor lamina is between about 1 micron to about 50 microns.

11. The method of claim 1 wherein the thickness of the semiconductor lamina remains within a 20% deviation of its initially provided thickness during fabrication of the backside illuminated sensor.

12. A method of fabricating a backside-illuminated sensor, the method comprising the steps of:

providing a semiconductor donor body having a first surface and a first conductivity;

forming a doped region within the semiconductor donor body at the first surface, wherein the doped region has a second conductivity;

implanting ions into the first surface of the semiconductor donor body to define a cleave plane;

cleaving a semiconductor lamina from the semiconductor donor body at the cleave plane, wherein the cleave plane forms a back surface of the semiconductor lamina, wherein the first surface of the semiconductor donor body is a front surface of the semiconductor lamina, and wherein the front surface includes the doped region;

contacting a temporary carrier to the back surface of the semiconductor lamina;

forming an electrical connection to the doped region on the front side of the semiconductor lamina;

removing the temporary carrier from the back surface; and

fabricating a backside-illuminated sensor from the semiconductor lamina, wherein a thickness between the front side and the back surface of the semiconductor lamina remains substantially unchanged during fabrication of the backside-illuminated sensor;

wherein the thickness of the cleaved semiconductor lamina is substantially equivalent to a desired final thickness of a semiconductor substrate in the fabricated backside-illuminated sensor.

13. A method of fabricating a backside-illuminated sensor, the method comprising the steps of:

providing a semiconductor donor body having a first surface and a first conductivity;

forming a doped region within the semiconductor donor body at the first surface, wherein the doped region has a second conductivity;

implanting ions into the first surface of the semiconductor donor body to define a cleave plane;

cleaving a semiconductor lamina from the semiconductor donor body at the cleave plane, wherein the cleave plane forms a back surface of the semiconductor lamina, wherein the first surface of the semiconductor donor body is a front surface of the semiconductor lamina, and wherein the front surface includes the doped region;

contacting a temporary carrier to the back surface of the semiconductor lamina;

forming an electrical connection to the doped region on the front side of the semiconductor lamina;

removing the temporary carrier from the back surface; and

fabricating a backside-illuminated sensor from the semiconductor lamina, wherein a thickness between the front side and the back surface of the semiconductor lamina remains substantially unchanged during fabrication of the backside-illuminated sensor;

wherein only the steps of forming the doped region, implanting ions, and cleaving the semiconductor donor body have processing temperatures above about 450 degrees Celsius.

Assignments (5)
CHANGE OF NAME Recorded May 16, 2023
From: NEUTRON THERAPEUTICS, INC.
To: NEUTRON THERAPEUTICS LLC
Reel/Frame 063662/0362 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 4, 2015
From: GTAT CORPORATION D/B/A GT ADVANCED TECHNOLOGIES
To: NEUTRON THERAPEUTICS INC.
Reel/Frame 037047/0004 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 9, 2012
From: SILICON VALLEY BANK; TWIN CREEKS TECHNOLOGIES, INC.
To: GTAT CORPORATION
Reel/Frame 029275/0076 →
CORRECTIVE ASSIGNMENT TO CORRECT THE RECEIVING PARTY POSTAL CODE FROM 91534 TO 95134 PREVIOUSLY RECORDED ON REEL 028034 FRAME 0982. ASSIGNOR(S) HEREBY CONFIRMS THE CORRECT POSTAL CODE IS 95134 AS INDICATED ON THE ORIGINAL ASSIGNMENT. Recorded Apr 13, 2012
From: MURALI, VENKATESAN; CHARI, ARVIND; PRABHU, GOPAL; PETTI, CHRISTOPHER J
To: TWIN CREEKS TECHNOLOGIES, INC.
Reel/Frame 028042/0275 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 12, 2012
From: MURALI, VENKATESAN; CHARI, ARVIND; PRABHU, GOPAL; PETTI, CHRISTOPHER J.
To: TWIN CREEKS TECHNOLOGIES, INC.
Reel/Frame 028034/0982 →