IP Library Granted Patent US 8,680,828
Granted Patent B2
US 8,680,828 · App. 13/425,940 · Granted Mar 25, 2014

Voltage regulator

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Quick Facts
Patent No.
US 8,680,828
App. No.
13/425,940
Granted
Mar 25, 2014
Kind
B2
Abstract

There is provided a voltage regulator capable of achieving a fast transient response upon activation without allowing an abnormal consumption current to flow. The voltage regulator of the present invention includes: a booster circuit for detecting output current from an output transistor and outputting a boost signal to a first differential amplifier circuit; a sensing transistor for sensing the output current; a first transistor for making an adjustment to enable the output current to be copied accurately; and a second differential amplifier circuit in which the output terminal is connected to the gate of the first transistor, the inverting input terminal is connected to the drain of the sensing transistor, and the non-inverting input terminal is connected to the output terminal.

Claims (26)

1. A voltage regulator comprising:

a reference voltage circuit for outputting a reference voltage;

an output transistor;

a first differential amplifier circuit for amplifying and outputting a difference between the reference voltage and a divided voltage obtained by dividing voltage output from the output transistor to control a gate of the output transistor;

a booster circuit for detecting output current from the output transistor and outputting a signal to the first differential amplifier circuit,

wherein the booster circuit performs control operations to increase a bias current flowing through the first differential amplifier circuit according to an output current from the output transistor, and increases a response time of the first differential amplifier circuit;

a sensing transistor having a gate connected to an output of the first differential amplifier for sensing the output current;

a first transistor having a source connected to a drain of the sensing transistor and to the booster circuit for making an adjustment to enable the output current to be copied accurately by the sensing transistor; and

a second differential amplifier circuit in which an output terminal is connected to a gate of the first transistor, an inverting input terminal is connected to the drain of the sensing transistor, and a non-inverting input terminal is connected to an output terminal of the voltage regulator.

2. The voltage regulator according to claim 1 , wherein the booster circuit includes:

a second transistor in which a gate is connected to a drain and a gate of a third transistor, a drain is connected to a gate and a drain of a fourth transistor, and a source is connected to a first resistor;

a fifth transistor in which a drain is connected to the drain of the third transistor, and a gate and a source are connected to the gate and source of the fourth transistor, respectively;

the fourth transistor whose gate and drain are connected to the drain of the second transistor;

the third transistor whose source is connected to a ground; and

the first resistor connected to the source of the second transistor,

whereby a resistance value of the first resistor is adjusted to adjust a value of a load current to be detected.

3. The voltage regulator according to claim 1 , wherein the booster circuit includes:

a second transistor whose gate is connected to an output of a third differential amplifier circuit;

a third transistor in which a gate and a drain are connected to a source of the second transistor and an inverting input terminal of the third differential amplifier circuit, and a source is connected to a ground; and

the third differential amplifier circuit whose non-inverting input terminal is connected to a second reference voltage circuit,

whereby a voltage value of the second reference voltage circuit is adjusted to adjust a value of a load current to be detected.

4. The voltage regulator according to claim 1 , wherein the booster circuit includes:

a second transistor whose gate is connected to an output of a third differential amplifier circuit;

a third transistor whose gate and drain are connected to a first terminal of a first resistor; and

the third differential amplifier circuit in which a non-inverting input terminal is connected to a second reference voltage circuit, and an inverting input terminal is connected a source of the second transistor and a second terminal of the first resistor,

whereby a resistance value of the first resistor is adjusted to adjust a value of a load current to be detected.

Assignments (3)
CHANGE OF NAME Recorded Mar 12, 2018
From: SII SEMICONDUCTOR CORPORATION
To: ABLIC INC.
Reel/Frame 045567/0927 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE PREVIOUSLY RECORDED AT REEL: 037783 FRAME: 0166. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Feb 23, 2016
From: SEIKO INSTRUMENTS INC
To: SII SEMICONDUCTOR CORPORATION
Reel/Frame 037903/0928 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 11, 2016
From: SEIKO INSTRUMENTS INC
To: SII SEMICONDUCTOR CORPORATION .
Reel/Frame 037783/0166 →