PHOTOVOLTAIC DEVICE WITH BUFFER LAYER
A method of manufacturing a structure can include forming a buffer layer on a transparent conductive oxide layer, where the buffer layer includes a layer including zinc and tin, and the transparent conductive oxide layer includes a layer including cadmium and tin.
1 . A structure comprising:
a substrate;
a transparent conductive oxide layer adjacent to the substrate, wherein the transparent conductive oxide layer comprises cadmium and tin; and
a buffer layer adjacent to the transparent conductive oxide layer, wherein the buffer layer comprises zinc and tin.
2 . The structure of claim 1 , wherein the buffer layer has a thickness of about 50 Á to about 2000 Á.
3 . The structure of claim 1 , wherein the buffer layer has a tin to zinc ratio that ranges from about 1:100 to about 100:1 by weight.
4 . The structure of claim 1 , wherein the buffer layer comprises a zinc tin oxide or a zinc stannate.
5 . The structure of claim 1 , wherein the transparent conductive oxide layer comprises a cadmium stannate.
6 . The structure of claim 1 , wherein the substrate comprises a glass.
7 . The structure of claim 1 , further comprising
one or more barrier layers on a soda-lime glass substrate, wherein the transparent conductive oxide layer is positioned on the one or more barrier layers, wherein each of the one or more barrier layers comprises a material selected from the group consisting of silicon oxide, aluminum-doped silicon oxide, boron-doped silicon oxide, phosphorous-doped silicon oxide, silicon nitride, aluminum-doped silicon nitride, boron-doped silicon nitride, phosphorous-doped silicon nitride, silicon oxide-nitride, titanium oxide, niobium oxide, tantalum oxide, aluminum oxide, zirconium oxide, and tin oxide, wherein the transparent conductive oxide layer comprises a cadmium stannate, and the buffer layer comprises a zinc tin oxide.
8 . The structure of claim 7 , further comprising a semiconductor window layer adjacent to the buffer layer, wherein the semiconductor window layer comprises cadmium sulfide.
9 . The structure of claim 8 , wherein the semiconductor window layer has a thickness of about 50 ̂ A to about 500 ̂ A.
10 . The structure of claim 8 , further comprising a semiconductor absorber layer adjacent to the semiconductor window layer, wherein the semiconductor absorber layer comprises cadmium telluride.
11 . The structure of claim 1 , further comprising a cadmium sulfide layer between the transparent conductive oxide layer and the buffer layer.
12 . A method of manufacturing a structure, comprising:
forming a transparent conductive oxide layer adjacent to a substrate, wherein the transparent conductive oxide layer comprises cadmium and tin; and
forming a buffer layer adjacent to the transparent conductive oxide layer, wherein the buffer layer comprises zinc and tin.
13 . The method of claim 12 , wherein forming a buffer layer comprises sputtering the buffer layer in the presence of an oxygen gas, argon gas, or an oxygen-argon gas mix.
14 . The method of claim 12 , further comprising
forming one or more barrier layers adjacent to the substrate, wherein the substrate comprises soda-lime glass;
forming the transparent conductive oxide layer on the one or more barrier layers, wherein each of the one or more barrier layers comprises a material selected from the group consisting of silicon oxide, aluminum-doped silicon oxide, boron-doped silicon oxide, phosphorous-doped silicon oxide, silicon nitride, aluminum-doped silicon nitride, boron-doped silicon nitride, phosphorous-doped silicon nitride, silicon oxide-nitride, titanium oxide, niobium oxide, tantalum oxide, aluminum oxide, zirconium oxide, and tin oxide, and wherein the transparent conductive oxide layer comprises a cadmium stannate; and
forming the buffer layer on the transparent conductive oxide layer, wherein the buffer layer comprises a zinc tin oxide with a tin content of about 15%, and a thickness of about 250 Á to about 1000 Á.
15 . The method of claim 12 , further comprising the step of annealing the substrate after the step of forming the buffer layer.
16 . The method of claim 15 , wherein the annealing comprises heating the substrate to temperature in a range of about 500° C. to about 700° C.
17 . The method of claim 12 , further comprising the step of forming a semiconductor window layer adjacent to the buffer layer, wherein the semiconductor window layer comprises cadmium sulfide.
18 . The method of claim 17 , wherein the step of forming the semiconductor window layer comprises sputtering.
19 . The method of claim 17 , further comprising the step of forming a semiconductor absorber layer adjacent to the semiconductor window layer, wherein the semiconductor absorber layer comprises cadmium telluride.
20 . The method of claim 12 , further comprising forming a cadmium sulfide layer between the transparent conductive oxide layer and the buffer layer.
21 - 27 . (canceled)