Liquid crystal display and method of manufacturing the same
View Patent ↗The present invention provides a thin film transistor having high performance in a liquid crystal display, and a manufacturing method of a liquid crystal display according to an exemplary embodiment of the present invention that includes: forming a gate line including a gate electrode on a substrate; forming a gate insulating layer on the gate line; forming a data line including a source electrode and a drain electrode facing the source electrode on the gate insulating layer; forming a partition defining a pixel area and having an opening region exposing the gate insulating layer on the gate electrode, the source electrode and the drain electrode on the gate line, and the data line and the drain electrode; forming a semiconductor in the opening region; forming a color filter in the pixel area defined by the partition; and forming a pixel electrode connected to the drain electrode on the color filter.
1. A method for manufacturing a liquid crystal display, comprising:
forming a gate line on a substrate, the gate line comprising a gate electrode;
forming a gate insulating layer on the gate line;
forming a data line on the gate insulating layer, the data line comprising a source electrode and a drain electrode facing the source electrode;
forming a partition on the gate electrode and the data line, the partition having an opening region exposing the gate insulating layer on the gate electrode;
forming a semiconductor in the opening region;
forming a color filter in the pixel area defined by the partition; and
forming a pixel electrode on the color filter and connected to the drain electrode.
2. The method of claim 1 , further comprising
forming a passivation layer on the partition and the color filter before forming the pixel electrode.
3. The method of claim 2 , wherein
the semiconductor and the color filter are formed by an inkjet method.
4. The method of claim 3 , wherein
the semiconductor is an oxide semiconductor.
5. The method of claim 2 , wherein
a contact hole exposing the drain electrode is formed in the passivation layer and the color filter before forming the pixel electrode.
6. The method of claim 2 , wherein
a contact hole exposing the drain electrode is formed in the passivation layer and the partition before forming the pixel electrode.
7. The method of claim 2 , further comprising
forming a light blocking member on the passivation layer, the light blocking member comprising portions corresponding to the gate line and the data line.
8. The method of claim 7 , further comprising
forming a spacer on the passivation layer.
9. The method of claim 1 , further comprising
forming a light blocking member on the passivation layer, the light blocking member comprising portions corresponding to the gate line and the data line.
10. The method of claim 1 , further comprising
forming a spacer on a portion corresponding to the partition.
11. The method of claim 1 , wherein the partition is formed directly on the data line.
12. The method of claim 1 , wherein the semiconductor contacts the partition.
13. The method of claim 1 , wherein the partition contacts the source electrode and the drain electrode.
14. The method of claim 1 , wherein the partition contacts the gate insulating layer.
15. The method of claim 1 , wherein the opening region exposes a portion of the gate insulating layer disposed between the source electrode and the drain electrode.