Two-step searcher for cell discovery
View Patent ↗Disclosed are various embodiments involving a two-step searcher for cell discovery. Multiple scrambling codes associated with multiple neighboring cells are obtained. Slot timing is obtained for a received signal based at least in part on a detection of primary synchronization peak energy in the received signal. One of the scrambling codes for decoding the received signal is identified based at least in part on testing multiple scrambling code hypotheses in parallel during an accumulation time period of the received signal in response to obtaining the slot timing.
1. A wireless communications device comprising:
at least one processor and a memory, wherein the at least one processor accesses the memory to perform operations comprising:
obtaining scrambling codes associated with a plurality of neighboring cells;
obtaining slot timing for a signal received from one of the plurality of neighboring cells based at least in part on a detection of primary synchronization peak energy in the received signal;
testing, in response to obtaining the slot timing, frame timing hypotheses and at least two of the scrambling codes in parallel during an accumulation time period of the received signal, wherein each of the frame timing hypotheses indicates one of a plurality of slot positions in a frame; and
identifying one of the frame timing hypotheses and one of the at least two scrambling codes for decoding the received signal, the one of the frame timing hypotheses and the one of the at least two scrambling codes having resulted in a global maximum accumulated energy value during the testing.
2. The wireless communications device of claim 1 , wherein the received signal corresponds to a wideband code division multiple access (WCDMA) signal.
3. The wireless communications device of claim 1 , wherein the operations further comprise identifying the one of the scrambling codes during a discontinuous reception (DRX) cycle.
4. The wireless communications device of claim 1 , wherein the plurality of neighboring cells belong to a monitored set of cells that is distinct from an active set of cells.
5. The wireless communications device of claim 1 , wherein the accumulation time period increases when one of transmit diversity or receive diversity is employed and a clock rate is held constant.
6. The wireless communications device system of claim 5 , wherein the operations further comprise identifying an identifier for the one of the scrambling codes, and an identifier for the frame timing that resulted in the global maximum accumulated energy value.
7. The wireless communications device of claim 6 , wherein the operations further comprise reporting a total accumulated energy value corresponding to a time period within the accumulation time period, the time period being associated with the maximum accumulated energy value.
8. The wireless communications device of claim 5 , wherein the operations further comprise simultaneously providing a sequence of a plurality of scrambling code phases corresponding to a selected one of the frame timing hypotheses and a selected one of the at least two of the scrambling codes.
9. The wireless communications device of claim 8 , wherein at least 8 scrambling code phases are simultaneously provided.
10. The wireless communications device of claim 5 , wherein the plurality of slot positions in the frame comprises 15 slot positions in the frame.
11. The wireless communications device of claim 1 , wherein the accumulation time period is less than L slot time periods when the scrambling codes include fewer than L×16 scrambling codes.
12. A method for cell discovery in a wireless communications device, comprising:
obtaining scrambling codes associated with a plurality of neighboring cells;
obtaining slot timing for a received signal based at least in part on a detection of primary synchronization peak energy in the received signal;
testing, in response to obtaining the slot timing, frame timing hypotheses and at least two of the scrambling codes in parallel during an accumulation time period of the received signal to determine an accumulated energy value associated with each of the frame timing hypotheses in combination with each of the at least two scrambling codes, wherein each of the frame timing hypotheses indicates one of a plurality of slot positions in a frame; and
identifying, by a processor, one of the frame timing hypotheses and one of the at least two scrambling codes for decoding the received signal based at least in part on the testing of the frame timing hypotheses and the at least two of the scrambling codes in parallel, the identified one of the frame timing hypotheses and the one of the at least two scrambling codes being associated with a global maximum accumulated energy value.
13. The method of claim 12 , wherein the received signal corresponds to a wideband code division multiple access (WCDMA) signal.
14. The method of claim 13 , wherein each of the frame timing hypotheses indicates one of a plurality of slot positions in a frame.
15. The method of claim 13 , wherein the identifying further comprises simultaneously providing a sequence of a plurality of scrambling code phases corresponding to a selected one of the at least two of the scrambling codes and a selected one of the frame timing hypotheses.
16. The method of claim 15 , wherein at least 8 scrambling code phases are simultaneously provided.
17. The method of claim 12 , wherein the accumulation time period is less than two slot time periods.
18. The method of claim 12 , wherein the accumulation time period increases when one of transmit diversity or receive diversity is employed and a clock rate is held constant.
19. The method of claim 12 , wherein a clock rate increases when one of transmit diversity or receive diversity is employed and the accumulation time period is held constant.
20. A computer program product comprising instructions stored in a non-transitory computer-readable storage medium, the instructions comprising:
instructions for obtaining scrambling codes associated with neighboring cells;
instructions for obtaining slot timing for a received signal based at least in part on a detection of primary synchronization peak energy in the received signal;
instructions for testing frame timing hypotheses and at least two of the scrambling codes in parallel during an accumulation time period of the received signal, wherein each of the frame timing hypotheses indicates one of a plurality of slot positions in a frame; and
instructions for identifying, by a processor, one of the frame timing hypotheses and one of the scrambling codes for decoding the received signal, the testing of the one of the frame timing hypotheses and the one of the scrambling codes having resulted in a global maximum accumulated energy value.