Thin film transistor and manufacturing method thereof
View Patent ↗A thin film transistor is provided. A thin film transistor according to an exemplary embodiment of the present invention includes: a substrate; a gate line disposed on the substrate and including a gate electrode; a semiconductor layer disposed on the substrate and including at least a portion overlapping the gate electrode; a gate insulating layer disposed between the gate line and the semiconductor layer; and a source electrode and a drain electrode disposed on the substrate and facing each other over a channel region of the semiconductor layer. The gate insulating layer includes a first region and a second region, the first region corresponds to the channel region of the semiconductor layer, the first region is made of a first material, the second region is made of a second material, and the first material and the second material have different atomic number ratios of carbon and silicon.
1. A method of manufacturing a thin film transistor, comprising:
forming a gate line on a substrate;
forming a gate insulating layer on the gate line;
irradiating ultraviolet rays upon the gate insulating layer through a mask;
heat treating the gate insulating layer;
forming a semiconductor layer on the gate insulating layer; and
forming a source electrode and a drain electrode on the semiconductor layer,
wherein, in the irradiating, the ultraviolet rays are selectively irradiated upon a portion of the gate insulating layer corresponding to a channel region of the semiconductor layer.
2. The method of claim 1 , wherein
the forming the gate insulating layer further comprises coating a solution type of insulating material on the gate line.
3. The method of claim 2 , wherein
the forming the gate insulating layer further comprises forming the gate insulating layer with a spin coating method or an inkjet method.
4. The method of claim 3 , wherein
the mask comprises an opening part and a light blocking part, and the opening part is disposed corresponding to a channel region of the semiconductor layer.
5. The method of claim 4 , wherein
the gate insulating layer comprises a first region to be irradiated by ultraviolet rays through the opening part, and a second region in which ultraviolet rays are to be blocked by the light blocking part, and
a carbon/silicon atomic number ratio of a first material forming the first region is smaller than the carbon/silicon atomic number ratio of a second material forming the second region.
6. The method of claim 5 , wherein
a thickness of the gate insulating layer is substantially the same in the first region as in the second region.
7. The method of claim 2 , wherein
the solution type of insulating material comprises organo-siloxane or organo-silsequioxane.
8. The method of claim 7 , wherein
the mask comprises an opening part and a light blocking part,
the gate insulating layer comprises a first region to be irradiated by ultraviolet rays through the opening part, and a second region in which ultraviolet rays are to be blocked by the light blocking part, and
a carbon/silicon atomic number ratio of a first material forming the first region is smaller than the carbon/silicon atomic number ratio of a second material forming the second region.
9. The method of claim 8 , wherein
a dielectric constant of the first region is larger than the dielectric constant of the second region.