Semiconductor device and method for manufacturing the same
An object of the present invention is to prevent the deterioration of a TFT (thin film transistor). The deterioration of the TFT by a BT test is prevented by forming a silicon oxide nitride film between the semiconductor layer of the TFT and a substrate, wherein the silicon oxide nitride film ranges from 0.3 to 1.6 in a ratio of the concentration of N to the concentration of Si.
1. A semiconductor device comprising:
a first insulating layer comprising silicon, nitrogen, and oxygen over a substrate;
a thin film transistor over the first insulating layer,
a planarization layer over the thin film transistor, and
a pixel electrode over the planarization layer,
wherein the pixel electrode is electrically in contact with the thin film transistor, and
wherein a concentration ratio of nitrogen to silicon of the first insulating layer ranges from 0.3 to 1.6.
2. The semiconductor device according to claim 1 ,
wherein a concentration ratio of oxygen to silicon of the first insulating layer ranges from 0.1 to 1.7.
3. The semiconductor device according to claim 1 , further comprising a second insulating layer between the first insulating layer and the thin film transistor, wherein the second insulating layer comprising silicon, nitrogen, and oxygen.
4. The semiconductor device according to claim 1 ,
wherein the thin film transistor comprises a semiconductor layer including silicon.
5. The semiconductor device according to claim 1 ,
wherein the semiconductor layer is a crystalline semiconductor layer.
6. The semiconductor device according to claim 1 ,
wherein the planarization layer includes a resin material.
7. The semiconductor device according to claim 1 ,
wherein the pixel electrode is an anode of a light-emitting element.
8. The semiconductor device according to claim 1 ,
wherein the substrate is a glass substrate.
9. A semiconductor device comprising:
a first insulating layer comprising silicon, nitrogen, and oxygen over a substrate;
a thin film transistor over the first insulating layer,
a planarization layer over the thin film transistor, and
a pixel electrode over the planarization layer,
wherein the pixel electrode is electrically in contact with the thin film transistor,
wherein a concentration ratio of nitrogen to silicon of the first insulating layer ranges from 0.6 to 1.4, and
wherein a concentration of nitrogen of the first insulating layer is higher than 2×10 20 atoms/cm 3 .
10. The semiconductor device according to claim 9 ,
wherein a concentration ratio of oxygen to silicon of the first insulating layer ranges from 0.1 to 1.7.
11. The semiconductor device according to claim 9 , further comprising a second insulating layer between the first insulating layer and the thin film transistor, wherein the second insulating layer comprising silicon, nitrogen, and oxygen.
12. The semiconductor device according to claim 9 ,
wherein the thin film transistor comprises a semiconductor layer including silicon.
13. The semiconductor device according to claim 12 ,
wherein the semiconductor layer is a crystalline semiconductor layer.
14. The semiconductor device according to claim 9 ,
wherein the planarization layer includes a resin material.
15. The semiconductor device according to claim 9 ,
wherein the pixel electrode is an anode of a light-emitting element.
16. The semiconductor device according to claim 9 ,
wherein the substrate is a glass substrate.
17. A semiconductor device comprising:
a first insulating layer comprising silicon, nitrogen, and oxygen over a substrate;
a thin film transistor over the first insulating layer,
a planarization layer over the thin film transistor, and
a pixel electrode over the planarization layer,
wherein the pixel electrode is electrically in contact with the thin film transistor,
wherein a concentration ratio of nitrogen to silicon of the first insulating layer ranges from 0.3 to 1.6, and
wherein a concentration of nitrogen of the first insulating layer is higher than 2× 10 20 atoms/cm 3 .
18. The semiconductor device according to claim 17 ,
wherein a concentration ratio of oxygen to silicon of the first insulating layer ranges from 0.1 to 1.7.
19. The semiconductor device according to claim 17 , further comprising a second insulating layer between the first insulating layer and the thin film transistor, wherein the second insulating layer comprising silicon, nitrogen, and oxygen.
20. The semiconductor device according to claim 17 ,
wherein the thin film transistor comprises a semiconductor layer including silicon.
21. The semiconductor device according to claim 20 ,
wherein the semiconductor layer is a crystalline semiconductor layer.
22. The semiconductor device according to claim 17 ,
wherein the planarization layer includes a resin material.
23. The semiconductor device according to claim 17 ,
wherein the pixel electrode is an anode of a light-emitting element.
24. The semiconductor device according to claim 17 ,
wherein the substrate is a glass substrate.
25. A semiconductor device comprising:
a first insulating layer comprising silicon, nitrogen, and oxygen over a substrate;
a semiconductor layer of a thin film transistor on the first insulating layer,
a planarization layer over the semiconductor layer, and
a pixel electrode over the planarization layer,
wherein the pixel electrode is electrically in contact with the thin film transistor, and
wherein a concentration ratio of nitrogen to silicon of the first insulating layer ranges from 0.6 to 1.4.
26. The semiconductor device according to claim 25 ,
wherein a concentration ratio of oxygen to silicon of the first insulating layer ranges from 0.1 to 1.7.
27. The semiconductor device according to claim 25 , further comprising a second insulating layer between the first insulating layer and the semiconductor layer, wherein the second insulating layer comprising silicon, nitrogen, and oxygen.
28. The semiconductor device according to claim 25 ,
wherein the semiconductor layer includes silicon.
29. The semiconductor device according to claim 28 ,
wherein the semiconductor layer is a crystalline semiconductor layer.
30. The semiconductor device according to claim 25 ,
wherein the planarization layer includes a resin material.
31. The semiconductor device according to claim 25 ,
wherein the pixel electrode is an anode of a light-emitting element.
32. The semiconductor device according to claim 25 ,
wherein the substrate is a glass substrate.