Wireless communications chip with multi-port distributed antenna
View Patent ↗Methods and systems for power combining in a multi-port distributed antenna are disclosed and may include power combining signals from power amplifiers (PAs) on a chip. The PAs may be coupled to a single distributed antenna via antenna ports. A phase of each of the signals may be matched at the antenna ports via phase-matching circuitry. A characteristic impedance may be configured at the ports based on a location of the ports. The PAs may be impedance matched to the antenna ports via impedance matching elements. A power level of the power-combined signals may be monitored via a power detector coupled to the distributed antenna. The power detector may include an envelope detector, such as a diode. The antenna may be integrated on the chip or may be located external to the chip. The signals may include RF signals and the antenna may include a microstrip antenna.
1. A wireless communications chip comprising:
at least one circuit comprising a plurality of power amplifiers, and said plurality of on-chip power amplifiers being coupled to a distributed antenna via a plurality of antenna ports;
said at least one circuit being operable to produce combined signals from said plurality of power amplifiers;
said at least one circuit being operable to match a phase of each of said combined signals at said plurality of antenna ports.
2. The wireless communications chip of claim 1 , wherein said at least one circuit is operable to configure a characteristic impedance of at least one of said plurality of antenna ports.
3. The wireless communications chip of claim 1 , wherein said at least one circuit comprises an impedance matching element operable to impedance match at least one of said plurality of power amplifiers to one of said plurality of antenna ports.
4. The wireless communications chip of claim 1 , wherein said at least one circuit comprises a power detector coupled to said distributed antenna, said power detector being operable to monitor a power level of said combined signals.
5. The wireless communications chip of claim 1 , wherein said at least one circuit comprises an envelope detector, and said envelope detector is operable to function as a power detector.
6. The wireless communications chip of claim 5 , wherein said at least one circuit comprises a diode that is operable to function as said envelope detector.
7. The wireless communications chip of claim 1 , wherein said distributed antenna comprises a microstrip antenna.