Multi-standard multi-rate filter

1. A method for decimating a digital signal by a factor of M and matching it to a desired channel bandwidth, comprising:

a. Applying input samples of said digital signal to an M-1 stage tapped delay line;

b. Downsampling said input samples and outputs of said tapped delay line stages by a factor of M;

c. Applying said M downsampled values to M allpass IIR filters where the phase of said M allpass IIR filters add constructively at frequencies below a passband frequency, and add destructively at frequencies above a stopband frequency, and where:

i. Said passband frequency is less than the input sample rate divided by 2 times M;

ii. Said stopband frequency is greater than the input sample rate divided by 2 times M;

d. Summing the outputs of said M allpass IIR filters;

e. Scaling said sum by a factor of 1/M; and

f. Applying said scaled sum to a digital channel filter.

2. The method of claim 1 where said allpass IIR filters are realized as 1-coefficient structures.

3. The method of claim 1 where said allpass IIR filters are realized as 2-coefficient structures.

4. The method of claim 1 where said allpass IIR filters are realized as a cascade of 1-coefficient structures.

5. The method of claim 1 where said allpass IIR filters are designed using differential evolution.

6. The method of claim 1 where said digital channel filter is a generalized N-path polyphase IIR filter.

7. A method for selectively decimating a digital signal by a factor equal to the product of any number of the positive integers M 1 , M 2 , . . . , and M n , and matching it to a desired channel bandwidth comprising the steps of:

a. Setting a buffer equal to said digital signal to be decimated;

b. Setting k equal to 1;

c. If M k is in said product, inputting said buffer to the input of an M k -path decimate by M k method and placing output in said buffer;

d. Incrementing said k;

e. If k less than or equal to n, going to step c;

f. Applying said buffer to a digital channel filter.

8. The method of claim 7 where said M k -path decimate by M k methods each comprise the following steps:

a. Applying said buffer input samples to a M k - 1 stage tapped delay line;

b. Downsampling said input sample, and outputs of said tapped delay line stages, by a factor of M k ;

c. Applying said M k downsampled values to M k allpass IIR filters each of whose phase responses add constructively at frequencies below a passband frequency, and add destructively at frequencies above a stopband frequency where:

i. Said passband frequency is less than the input sample rate divided by 2 times M k ;

ii. Said stopband frequency is greater than the input sample rate divided by 2 times M k ;

d. Summing the outputs of said M k allpass filters;

e. Scaling said sum by a factor of 1/M k .

9. The method of claim 8 where said allpass IIR filters are realized as 1-coefficient structures.

10. The method of claim 8 where said allpass IIR filters are realized as 2-coefficient structures.

11. The method of claim 8 where said allpass IIR filters are realized as a cascade of 1-coefficient structures.

12. The method of claim 8 where said allpass IIR filters are designed using differential evolution.

13. The method of claim 7 where said digital channel filter is a generalized N-path polyphase IIR filter.

14. The method of claim 7 where said decimation ratio is selected based on measured ACI.

15. The method of claim 7 where said decimation ratio is decreased when measured ACI increases.

16. The method of claim 7 where said decimation ratio is increased when measured ACI decreases.

17. A method for decimating a digital signal by a factor of M and matching it to a desired channel bandwidth, comprising:

applying input samples of the digital signal to an M-1 stage tapped delay line;

downsampling the input samples of the digital signal and output signals of each of the M-1 tapped delay line stages by a factor of M;

applying the M downsampled input samples and the M downsampled output signals of each of the M-1 tapped delay line stages to M allpass IIR filters where the phase of the M allpass IIR filters add constructively at frequencies below a passband frequency, and add destructively at frequencies above a stopband frequency; and

wherein the passband frequency is less than the input sample rate divided by 2 times M; and

wherein the stopband frequency is greater than the input sample rate divided by 2 times M.

18. The method of claim 17 , further comprising summing the outputs of the M allpass IIR filters.

19. The method of claim 18 , further comprising scaling the sum of the outputs of the M allpass IIR filters by a factor of 1/M.

20. The method of claim 19 , further comprising applying the scaled sum to a digital channel filter.