Internal power source voltage generating circuit of semiconductor memory and method for generating internal power source voltage
View Patent ↗An internal power source voltage generating circuit of a semiconductor memory and a corresponding method shorten an access delay upon transition of a data reading operation in an address period shorter than a prescribed minimum period to an operation in the prescribed minimum period. While a boosted voltage of an external power source voltage is supplied to the semiconductor memory as the internal power source voltage via an output line connected to one end of a condenser. A reference low potential is applied to the other end of the condenser and the external power source voltage is applied to the output line, thereby charging the condenser. If the internal power source voltage is lower than a threshold voltage, the internal power source voltage on the output line is boosted by applying the external power source voltage to the other end of the condenser.
1. An internal power source voltage generating circuit of a semiconductor memory to generate an internal power source voltage so as to drive a semiconductor memory based on an external power source voltage, comprising:
a first boosting part to supply a boosted voltage in which the external power source voltage is boosted to the semiconductor memory as the internal power source voltage via an output line; and
a second boosting part comprising a condenser having one end connected to the output line, and a boost driving control circuit wherein while a reference low potential is applied to the other end of the condenser, the external power source voltage is applied to the output line so as to perform a charging operation to charge the condenser, and if the internal power source voltage is lower than a threshold voltage, the external power source voltage is applied to the other end of the condenser, thereby raising a potential of the other end of the condenser.
2. The internal power source voltage generating circuit of a semiconductor memory recited in claim 1 , further comprising an address period determining part to determine whether a period of an address change of address data supplied to the semiconductor memory is shorter than a threshold period or not, wherein
the boost driving control circuit performs the charging operation if the address period determining part determines that the period of the address change is shorter than the threshold period.
3. The internal power source voltage generating circuit of a semiconductor memory recited in claim 2 wherein the boost driving control circuit performs the charging operation if the address period determining part determines that the period of the address change is shorter than the threshold period and the internal power source voltage is lower than the threshold voltage.
4. The internal power source voltage generating circuit of a semiconductor memory recited in claim 3 wherein the first boosting part generates the boosted voltage if the internal power source voltage is lower than a second threshold voltage that is higher than the threshold voltage.
5. The internal power source voltage generating circuit of a semiconductor memory re cited in claim 2 wherein the first boosting part generates the boosted voltage if the internal power source voltage is lower than the threshold voltage.
6. The internal power source voltage generating circuit of a semiconductor memory cited in claim 1 characterized in that the boost driving control circuit performs the charging operation if the internal power source voltage is lower than the threshold voltage.
7. The internal power source voltage generating circuit of a semiconductor memory cited in claim 6 wherein the first boosting part generates the boosted voltage if the internal power source voltage is lower than a second threshold voltage that is higher than the threshold voltage.
8. A method for generating an internal power source voltage of a semiconductor memory to generate an internal power source voltage so as to drive a semiconductor memory based on an external power source voltage, wherein
while it boosts the external power source voltage so as to generate a boosted voltage, which is supplied to the semiconductor memory as the internal power source voltage via an output line,
if the internal power source voltage is lower than the threshold voltage, depending on an address change of address data it charges the condenser wherein one end thereof is connected to the output line, and then it applies a prescribed high potential to the other end of the condenser, thereby boosting the voltage on the output line.