Granted Patent B2

US 8,891,214 · App. 13/450,536 · Granted Nov 18, 2014

Abstract

Claims (13)

1. Circuit comprising:

a transistor coupled between a supply voltage line and ground, the transistor comprising a control terminal coupled to an input signal line, and

first and second bipolar transistors coupled in series between the input signal line and ground, the first bipolar transistor having a base and the second bipolar transistor having a base

wherein the base of the first bipolar transistor is connected to the input signal line and the base of the second bipolar transistor is connected to ground;

first and second MOS transistors coupled in series between the input signal line and ground, the first MOS transistor having a gate and the second MOS transistor having a gate:

wherein the gate of the first MOS transistor is connected to the input signal line and gate of the second MOS transistor is connected to ground, and wherein a node between the first bipolar transistor and the second bipolar transistor is connected to a node between the first MOS transistor and the second MOS transistor.

2. The circuit of claim 1 , wherein the base of the first bipolar transistor is connected to the input signal line via a first resistor and the base of the second bipolar transistor is connected to ground via a second resistor.

3. The circuit of claim 1 , wherein the first and second bipolar transistors share an N + -region.

4. The circuit of claim 1 , wherein said MOS transistors are LDMOS transistors.

5. The circuit of claim 4 wherein the LDMOS transistor is adapted to amplify RF signals.

6. An integrated circuit comprising the circuit of claim 1 .

7. The integrated circuit of claim 6 , wherein the circuit forms part of a power amplifier.

8. An electronic device comprising the integrated circuit of claim 6 .

Assignments (13)