IP Library Granted Patent US 8,643,573
Granted Patent B2
US 8,643,573 · App. 13/454,864 · Granted Feb 4, 2014

Electro-optical apparatus and method of driving the electro-optical apparatus

Inventors: Toshiyuki Kasai (Okaya, JP); Yoichi Imamura (Chimoshi, JP); Tokuro Ozawa (Suwa, JP)
Assignee: Seiko Epson Corporation
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Quick Facts
Patent No.
US 8,643,573
App. No.
13/454,864
Granted
Feb 4, 2014
Kind
B2
Abstract

The invention provides an electro-optical apparatus that can prevent a shift in a threshold voltage of an amorphous silicon transistor while driving an organic EL device in a pixel circuit including the amorphous silicon transistor. A characteristic-adjustment circuit can be provided, which has a function of returning a shift in the threshold voltage of the amorphous silicon transistor included in the pixel circuit to the original state.

Claims (59)

1. An electro-optical apparatus, comprising:

a gate line;

a data line; and

a pixel circuit corresponding to intersections of the gate line and the data line,

the pixel circuit including a first transistor that is coupled between a first node and a second node, and a light-emitting element that is coupled to the first transistor through the first node, and

the first transistor being configured such that a first potential lower than a second potential of the first node is applied to a gate of the first transistor and a third potential lower than the second potential of the first node is applied to the second node of the first transistor during a first period.

2. The electro-optical apparatus according to claim 1 ,

the first transistor being configured such that the third potential of the second node is lower than the second potential of the first node during a second period.

3. The electro-optical apparatus according to claim 1 ,

the first transistor being an N-type transistor.

4. The electro-optical apparatus according to claim 3 ,

the first transistor being an amorphous silicon transistor.

5. The electro-optical apparatus according to claim 3 ,

the pixel circuit further including a capacitive element that is coupled between the first node and the gate of the first transistor.

6. The electro-optical apparatus according to claim 2 , further comprising:

a power source line,

the power source line being coupled to the first transistor through the second node during the second period, and

the pixel circuit further including a capacitive element that is coupled between the first node and the gate of the first transistor.

7. The electro-optical apparatus according to claim 2 ,

the light-emitting element not emitting light during the first period,

the first transistor being in the off-state during the second period.

8. The electro-optical apparatus according to claim 2 ,

the light-emitting element emitting light during the second period in a gray scale according to a conduction state of the first transistor set by a data signal supplied to the pixel circuit, and

the first transistor being in the off-state during the first period.

9. The electro-optical apparatus according to claim 8 ,

the data signal being supplied to the pixel circuit during a third period prior to the second period.

10. The electro-optical apparatus according to claim 3 ,

The pixel circuit further including a second transistor, and

the first voltage being supplied to the gate of the first transistor in the off-state through the second transistor.

11. An electro-optical apparatus, comprising:

a gate line;

a data line; and

a pixel circuit corresponding to intersections of the gate line and the data line,

the pixel circuit including a first transistor,

the first transistor being configured such that a gate potential lower than a source potential of a source of the first transistor is applied to a gate of the first transistor and a drain potential lower than the source potential is applied to a drain of the first transistor during a first period.

12. The electro-optical apparatus according to claim 11 ,

the first transistor being an N-type transistor.

13. The electro-optical apparatus according to claim 12 ,

the first transistor being an amorphous silicon transistor.

14. The electro-optical apparatus according to claim 12 ,

the pixel circuit further including a capacitive element that is coupled between the source and the gate of the first transistor.

15. The electro-optical apparatus according to claim 12 , further comprising:

a power source line,

the power source line being coupled to the first transistor through the drain during a second period, and

the pixel circuit further including a capacitive element that is coupled between the source and the gate of the first transistor.

16. The electro-optical apparatus according to claim 12 ,

the pixel circuits further including a light-emitting element, and

the source of the first transistor being positioned between the drain of the first transistor and the light emitting element.

17. A method for driving an electro-optical apparatus which has a pixel circuit including a driving transistor that has a first node and a second node, and a light-emitting element coupled to the driving transistor through the first node, the method comprising:

making the light-emitting element emit a light in a gray scale according to a data signal during a first period;

applying a first potential lower than a second potential of the first node to a gate of the driving transistor and applying a third potential lower than the second potential of the first node to the second node of the first transistor in a second period.

18. The method according to claim 17 ,

the driving transistor being an N-type transistor.

19. The method according to claim 18 ,

the pixel circuit further including a capacitive element that is coupled between the first node and the gate of the first transistor.

20. The method according to claim 18 , further comprising:

a power source line,

the power source line being coupled to the first transistor through the second node during a second period, and

the pixel circuit further including a capacitive element that is coupled between the first node and the gate of the first transistor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 12, 2023
From: SEIKO EPSON CORPORATION
To: LUMITEK DISPLAY TECHNOLOGY LIMITED
Reel/Frame 065221/0372 →
Priority Claims (2)
JP 2003-140973 · May 19, 2003 · national
JP 2004-084651 · Mar 23, 2004 · national
Continuity (3)
Continuation 12219511 · Jul 23, 2008
Continuation 10843377 · May 12, 2004
Related Publication 20120206508A1 · Aug 16, 2012