IP Library Granted Patent US 9,099,862
Granted Patent B1
US 9,099,862 · App. 13/459,621 · Granted Aug 4, 2015

Self ESD protected device and method thereof

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Quick Facts
Patent No.
US 9,099,862
App. No.
13/459,621
Granted
Aug 4, 2015
Kind
B1
Abstract

A self ESD protected RF transistor. The RF transistor is connected to a sub-circuit which causes the RF transistor to self-protect from ESD damage. The sub-circuit triggers the RF transistor to clamp a positive polarity ESD pulse to ground/emitter terminal. The sub-circuit also shunts a negative polarity ESD pulse to ground.

Claims (30)

1. A sub-circuit for protecting an electronic circuit from an Electro-Static Discharge (ESD), the electronic circuit comprising one or more transistors, the sub-circuit comprising:

a trigger circuit connected between a collector terminal and a base terminal of each of the one or more transistors, the trigger circuit configured to trigger the one or more transistors to a pre-defined state on a positive polarity ESD pulse, the one or more transistors operating in the pre-defined state clamping the positive polarity ESD pulse; and

a leakage circuit connected between the base terminal and an emitter terminal of the each of the one or more transistors, wherein the leakage circuit and the trigger circuit shunt a negative polarity ESD pulse to ground.

2. The sub-circuit of claim 1 , wherein the trigger circuit comprises one or more base-emitter diodes.

3. The sub-circuit of claim 1 , wherein the trigger circuit is connected to the base terminal of each of the one or more transistors through a resistor.

4. The sub-circuit of claim 2 , wherein the trigger circuit triggers the one or more transistors to the pre-defined state based on a sum of magnitude of forward base-emitter turn-on voltage of the one or more RF transistors, and a base-emitter junction breakdown voltage associated with each of the one or more base-emitter diodes.

5. The sub-circuit of claim 1 , wherein the leakage circuit shunts a leakage current of the trigger circuit to the ground.

6. The sub-circuit of claim 1 , wherein the leakage circuit comprises a base emitter diode.

7. The sub-circuit of claim 1 , wherein the one or more transistors turn on when triggered to the pre-defined state.

8. The sub-circuit of claim 1 , wherein the electronic circuit is a radio-frequency (RF) amplifier circuit.

9. An Electro-Static Discharge (ESD) protected RF amplifier circuit, the RF amplifier circuit comprising:

one or more RF transistors configured to amplify an RF signal; and

a sub-circuit for protecting the one or more RF transistors from the ESD, wherein the sub-circuit comprises:

a trigger circuit connected between a collector terminal and a base terminal of each of the one or more transistors, the trigger circuit configured to trigger the one or more transistors to a pre-defined state on a positive polarity ESD pulse, the one or more RF transistors operating in the pre-defined state clamping the positive polarity ESD pulse, and

a leakage circuit connected between the base terminal and an emitter terminal of the each of the one or more RF transistors, wherein the leakage circuit and the trigger circuit shunt a negative polarity ESD pulse to ground.

10. The RF amplifier circuit of claim 9 , wherein the one or more RF transistors operating in the pre-defined state clamp the positive polarity ESD pulse to the ground.

11. The RF amplifier circuit of claim 9 , wherein the one or more RF transistors operating in the pre-defined state clamp the positive polarity ESD pulse to the emitter terminal.

12. The RF amplifier circuit of claim 9 , wherein the trigger circuit comprises one or more base-emitter diodes.

13. The RF amplifier circuit of claim 9 , wherein the trigger circuit triggers the one or more RF transistors to the pre-defined state based on a sum of magnitude of forward base-emitter turn-on voltage of the one or more RF transistors, and a base-emitter junction breakdown voltage associated with each of the one or more base-emitter diodes.

14. The RF amplifier circuit of claim 9 , wherein the leakage circuit shunts a leakage current of the trigger circuit to the ground.

15. The RF amplifier circuit of claim 9 , wherein the trigger circuit is connected to the base terminal of each of the one or more RF transistors through a resistor.

16. The RF amplifier circuit of claim 9 , wherein the leakage circuit comprises a base-emitter diode.

17. The RF amplifier circuit of claim 9 , wherein the one or more transistors turn on when triggered to the pre-defined state.

18. An Electro-Static Discharge (ESD) protected RF amplifier circuit, the RF amplifier circuit comprising:

one or more RF transistors configured to amplify a RF signal; and

a sub-circuit for protecting the one or more RF transistors from the ESD, wherein the sub-circuit comprises:

a trigger circuit connected to a collector terminal of each of the one or more RF transistors and a base terminal of each of the one or more RF transistors through a resistor, the trigger circuit configured to trigger the one or more RF transistors to a pre-defined state on a positive polarity ESD pulse, the one or more RF transistors operating in the pre-defined state clamping the positive polarity ESD pulse, and

a leakage circuit connected between the base terminal and an emitter terminal of the each of the one or more RF transistors, wherein the leakage circuit and the trigger circuit shunt a negative polarity ESD pulse to ground.

19. The RF amplifier circuit of claim 18 , wherein the trigger circuit triggers the one or more RF transistors to the pre-defined state based on a sum of magnitude of forward base-emitter turn-on voltage of the one or more RF transistors, and a base-emitter junction breakdown voltage associated with each of one or more base-emitter diodes of the trigger circuit.

20. The RF amplifier circuit of claim 9 , wherein the RF amplifier circuit enables the one or more RF transistors to self-protect from the ESD damages with minimal die area consumption.

Assignments (9)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 24, 2017
From: II-VI OPTOELECTRONIC DEVICES, INC.
To: SKYWORKS SOLUTIONS, INC.
Reel/Frame 042551/0708 →
CHANGE OF NAME Recorded May 1, 2017
From: ANADIGICS, INC.
To: II-VI OPTOELECTRONIC DEVICES, INC.
Reel/Frame 042381/0761 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ERRONEOUS NUMBER 6790900 AND REPLACE IT WITH 6760900 PREVIOUSLY RECORDED ON REEL 034056 FRAME 0641. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT. Recorded Nov 21, 2016
From: ANADIGICS, INC.
To: SILICON VALLEY BANK
Reel/Frame 040660/0967 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE'S NAME PREVIOUSLY RECORDED AT REEL: 037973 FRAME: 0226. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT. Recorded May 18, 2016
From: ANADIGICS, INC.
To: II-VI INCORPORATED
Reel/Frame 038744/0835 →
RELEASE OF SECURITY INTEREST Recorded Mar 16, 2016
From: II-VI INCORPORATED
To: ANADIGICS, INC.
Reel/Frame 038119/0312 →
INTELLECTUAL PROPERTY SECURITY AGREEMENT Recorded Mar 1, 2016
From: ANADIGICS, INC.
To: II-IV INCORPORATED
Reel/Frame 037973/0226 →
RELEASE OF SECURITY INTEREST Recorded Mar 1, 2016
From: SILICON VALLEY BANK
To: ANADIGICS, INC.
Reel/Frame 037973/0133 →
SECURITY AGREEMENT Recorded Oct 27, 2014
From: ANADIGICS, INC.
To: SILICON VALLEY BANK
Reel/Frame 034056/0641 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 30, 2012
From: OZARD, KENNETH SEAN
To: ANADIGICS, INC.
Reel/Frame 028127/0496 →