Organic light emitting diode display and method for manufacturing the same
View Patent ↗An organic light emitting device according to one or more embodiments includes a gate line, a data line intersecting the gate line, a switching thin film transistor connected to the gate line and the data line, a driving thin film transistor connected to the switching thin film transistor, and a light emitting diode (LED) connected to the driving thin film transistor. The switching thin film transistor includes a control electrode connected to the gate line, a crystalline semiconductor overlapping the control electrode, and an input electrode and an output electrode are spaced apart from each other on the crystalline semiconductor, wherein the control electrode and the gate line are respectively disposed under and on the crystalline semiconductor and include different materials.
1. An OLED display comprising:
a first control electrode and a second control electrode formed on a substrate;
a first crystalline semiconductor and a second crystalline semiconductor formed on the first control electrode and the second control electrode;
a first input electrode and a first output electrode spaced apart from each other on the first crystalline semiconductor;
a second input electrode and a second output electrode facing each other on the second crystalline semiconductor;
an insulating layer formed on the first input electrode, the first output electrode, the second input electrode, and the second output electrode, and having a first contact hole exposing the first control electrode, a second contact hole exposing the first output electrode, a third contact hole exposing the second control electrode, and a fourth contact hole exposing the second output electrode;
a gate line formed on the insulating layer and connected to the first control electrode through the first contact hole;
a pixel electrode connected to the second output electrode through the fourth contact hole;
a common electrode facing the pixel electrode; and
a light emitting member disposed between the pixel electrode and the common electrode.
2. The OLED display of claim 1 , wherein
the gate line includes a metal having a lower melting point than that of the first control electrode.
3. The OLED display of claim 2 , wherein
the gate line includes one selected from an aluminum-containing metal, a copper-containing metal, and a silver-containing metal, and
the first control electrode includes one selected from a molybdenum-containing metal, a chromium-containing metal, a titanium-containing metal, a tantalum-containing metal, and a tungsten-containing metal.
4. The OLED display of claim 2 , wherein
the gate line and the pixel electrode are formed on the same layer.
5. The OLED display of claim 4 , further comprising
a connecting member connecting the first output electrode and the second control electrode to each other through the second contact hole and the third contact hole,
wherein the connecting member is formed on the same layer as the gate line and the pixel electrode.
6. The OLED display of claim 5 , further comprising
a voltage assistant line connected to the common electrode,
wherein the voltage assistant line is formed on the same layer as the gate line, the pixel electrode, and the connecting member.
7. The OLED display of claim 4 , further comprising
a voltage assistant line connected to the common electrode,
wherein the voltage assistant line is formed on the same layer as the gate line and the pixel electrode.
8. A method for manufacturing an OLED display, comprising:
forming a first control electrode and a second control electrode on a substrate;
forming a first crystalline semiconductor and a second crystalline semiconductor on the first control electrode and the second control electrode;
forming a first input electrode and a first output electrode spaced apart from each other on the first crystalline semiconductor, and forming the second input electrode and the second output electrode facing each other on the second crystalline semiconductor;
forming an insulating layer on the first input electrode, the first output electrode, the second input electrode, and the second output electrode;
forming a gate line connected to the first control electrode on the insulating layer;
forming a pixel electrode on the insulating layer;
forming a light emitting member on the pixel electrode; and
forming a common electrode on the light emitting member.
9. The method of claim 8 , wherein
the forming of the first crystalline semiconductor and the second crystalline semiconductor includes
depositing an amorphous silicon layer, and
crystallizing the amorphous silicon layer by using solid phase crystallization (SPC).
10. The method of claim 9 , wherein
the first control electrode and the second control electrode include a first metal having a higher melting point than a temperature of solid phase crystallization, and
the gate line includes a second metal having a lower melting point than that of the first metal.
11. The method of claim 10 , further comprising
a protecting member covering the gate line and is formed during the forming of the pixel electrode.
12. The method of claim 10 , wherein
the gate line and the pixel electrode are formed concurrently.
13. The method of claim 12 , wherein
a voltage assistant line connected to the common electrode is formed concurrently with the gate line and the pixel electrode.