IP Library Granted Patent US 9,468,048
Granted Patent B2
US 9,468,048 · App. 13/477,869 · Granted Oct 11, 2016

Input current regulator, driving method thereof, and disable circuit thereof

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Quick Facts
Patent No.
US 9,468,048
App. No.
13/477,869
Granted
Oct 11, 2016
Kind
B2
Abstract

The present invention relates to a dimmer and an input current regulator provided in a power supply. The input current regulator includes: a bleeding circuit generating a bleeding current from an input current passed through the dimmer; a sensing circuit sensing the input current, and controlling the bleeding circuit according to a sense voltage corresponding to the input current; and a biasing circuit generating a power voltage for operation of the input current regulator during operation of the power supply. The input current includes a bleeding current and a power current supplied to the power supply.

Claims (42)

1. An input current regulator comprising:

a bleeding circuit generating a bleeding current from an input current passed through a dimmer;

a sensing circuit sensing the input current, and controlling the bleeding circuit to generate the bleeding current according to a sense voltage corresponding to the input current when the input current is sensed by the sensing circuit to be smaller than a predetermined holding current of the dimmer; and

a biasing circuit generating a power voltage for operation of the input current regulator during operation of a power supply.

2. The input current regulator of claim 1 , wherein the biasing circuit generates the power voltage using an auxiliary voltage generated in an auxiliary coil coupled in an insulated manner with a primary side coil of the power supply with a predetermined turn ratio.

3. The input current regulator of claim 1 , wherein the sensing circuit generates a sink current controlling a source current supplied to the bleeding circuit from the biasing circuit.

4. The input current regulator of claim 3 , wherein the sensing circuit comprises a shunt regulator provided between a reference end and an input end to receive the sensing voltage and generating the sink current to the input end from an output end to maintain the sensing voltage with a predetermined reference voltage.

5. The input current regulator of claim 4 , wherein the sensing circuit further comprises a first resistor connected between the input end and the reference end of the shunt regulator.

6. The input current regulator of claim 5 , wherein the sensing circuit further comprises a capacitor coupled to the first resistor in parallel to filter the sensing voltage generated on the first resistor.

7. The input current regulator of claim 4 , wherein the bleeding circuit comprises:

a first resistor having a first end connected to a rectification circuit and the power supply; and

a transistor having a first electrode connected to a second end of the first resistor and a control electrode connected to the output end of the shunt regulator.

8. The input current regulator of claim 7 , wherein the bleeding circuit comprises a second resistor connected between a second electrode of the transistor and the reference end of the shunt regulator.

9. The input current regulator of claim 3 , wherein the sensing circuit comprises a BJT (bipolar junction transistor) comprising a first electrode and a control electrode and receiving a sense voltage according to the input current as a voltage difference between the control electrode and the first electrode, and

a sink current according to the voltage difference flows to the first electrode of the BJT from the second electrode of the BJT.

10. The input current regulator of claim 9 , wherein the bleeding circuit comprises a first resistor having a first end connected to a rectification circuit and the power supply and a transistor having a first electrode connected to a second end of the first resistor and a control electrode connected to a second electrode of the BJT.

11. The input current regulator of claim 10 , wherein the bleeding circuit comprises a second resistor connected between a second electrode of the transistor and a control electrode of the BJT.

12. The input current regulator of claim 2 , wherein the biasing circuit comprises a diode connected to the auxiliary voltage and a capacitor charged by a current flowing through the diode, and the power voltage is a voltage charged in the capacitor.

13. The input current regulator of claim 12 , wherein the sensing circuit comprises a shunt regulator having a reference end, an input end, and an output end, receiving the sense voltage according to the input current between the reference end and the input end, and generating a sink current flowing to the input end from the output end according to the sense voltage, and

a capacitor of the biasing circuit has a first end connected to the output end of the shunt regulator through a resistor and a second end connected to an input end of the shunt regulator.

14. The input current regulator of claim 13 , wherein the bleeding circuit comprises a transistor having a control electrode connected to the output end of the shunt regulator, a first electrode connected to the dimmer through a third resistor, and a second electrode connected to the reference end of the shunt regulator through a fourth resistor.

15. The input current regulator of claim 12 , wherein the sensing circuit comprises a BJT (bipolar junction transistor) comprising a control electrode and a first electrode and receiving a sense voltage according to the input current as a voltage difference between the control electrode and the first electrode, a sink current according to the voltage difference flows to the first electrode of the BJT from a second electrode of the BJT, and a capacitor of the biasing circuit includes a first end connected with the second electrode of the BJT through a fifth resistor and a second end connected to the first electrode of the BJT.

16. The input current regulator of claim 15 , wherein the bleeding circuit comprises a control electrode connected to the second electrode of the BJT, a first electrode connected to the dimmer through a third resistor, and a second electrode connected to a control electrode of the BJT through a fourth resistor.

17. The input current regulator of claim 1 , wherein the sensing circuit senses the input current using a sum of the bleeding current and a current supplied from the power supply, and the current supplied from the power supply to the sensing circuit is a current flowing to a switch that controls power transmission of the power supply.

18. A disable circuit connected to the input current regulator of claim 1 , the disable circuit comprising:

a dimming angle sensing circuit generating a comparison voltage according to a comparison result of an input voltage generated from rectification of an AC input that has passed through the dimmer and generating a dimming angle sense voltage corresponding to a dimming angle of the dimmer by low-pass filtering the comparison voltage; and

a dimming angle shunt regulator comprising a reference end, an input end, and an output end, the dimming angle shunt regulator being connected when a voltage between the reference end receiving the diming angle sense voltage and the input end is higher than a predetermined dimming angle reference voltage to generate a sink current flowing to the input end from the output end to which the power voltage is supplied.

19. The disable circuit of claim 18 , wherein the comparison result is generated by a comparing circuit that comprises a zener diode receiving the input voltage from a sixth resistor and connected when the input voltage is higher than a zener voltage of the zener diode, and the comparison voltage is a voltage of a first node where the sixth resistor and the zener diode are connected.

20. The disable circuit of claim 18 , wherein the comparison voltage is low-pass filtered by a filtering circuit that comprises seventh and eighth resistors connected between the comparison voltage and a ground and a capacitor connected between a second node where the seventh and eighth resistors are connected and the ground, and the dimming angle sense voltage is a voltage of the second node.

21. The disable circuit of claim 20 , wherein the ground of the disable circuit is connected to the ground of the input current regulator.

22. The disable circuit of claim 20 , wherein the ground of the disable circuit is connected to the ground of the power supply.

23. A driving method of a dimmer and an input current regulator provided in a power supply, the driving method comprising:

generating a sink current according to a sense voltage that depends on an input current passed through the dimmer;

generating a power voltage for operation of the input current regulator during operation of the power supply connected to the dimmer; and

generating a bleeding current flowing into the input current regulator according to the sink current to control a current supplied to the power supply when the input current is less than a holding current of the dimmer.

24. The driving method of claim 23 , wherein the power voltage is applied to a control electrode of a transistor through which the bleeding current flows, and

wherein controlling the bleeding current comprises varying the power voltage according to the sink current.

25. The driving method of claim 24 , wherein the generating the sink current comprises generating a sense voltage from a sum of a current flowing to a switch that controls power transmission of the power supply and the bleeding current.

26. The driving method of claim 23 , further comprising:

generating a comparison voltage according to a comparison result of an input voltage generated by rectifying a dimmer-passed AC input and a zener voltage;

generating a dimming angle sense voltage corresponding to a dimming angle of the dimmer by low-pass filtering the comparison voltage; and

decreasing of the power voltage by the sink current when the dimming angle sense voltage is higher than a predetermined dimming angle reference voltage.

Assignments (4)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 04481, FRAME 0541 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064072/0459 →
PATENT SECURITY AGREEMENT Recorded Nov 17, 2017
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 044481/0541 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 2, 2017
From: FAIRCHILD KOREA SEMICONDUCTOR, LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 044361/0205 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 30, 2012
From: EOM, HYUN-CHUL; YANG, SEUNGUK
To: FAIRCHILD KOREA SEMICONDUCTOR LTD.
Reel/Frame 029383/0271 →