Semiconductor Micro-Connector With Through-Hole Via and a Method for Making the Same
A micro-connector fabricated from a semiconductor material is disclosed. The micro-connector has one or more low resistance regions having a predetermined low resistance through its thickness. Opposing surfaces of the semiconductor layer have one or more complementary and opposing receiving volumes and one or more complementary mating elements defined on each of the respective surfaces within the low resistance regions for the receiving of a solder ball bond from, for instance a stackable microelectronic layer or component. The solder ball bonds of a separately provided electronic element can be inserted through the mating elements and into the volume and mechanically affixed and electrically coupled to the micro-connector on each of the surfaces for the electronic coupling of a first electronic element to a second electronic element.
1 . A micro-connector comprising:
a semiconductor micro-connector layer comprising a thickness, a first surface and a second surface,
at least one low resistance region defined through the thickness having a predefined low electrical resistance,
at least one insulative boundary having a predefined high electrical resistance defined through the thickness and encompassing the low resistance region, and,
a first receiving volume and at least one mating element defined in the low resistance region on the first surface and configured to receive a conductive element.
2 . The micro-connector of claim 1 further comprising a complementary and opposing second receiving volume and at least one mating element defined on the second surface within the same low resistance region and bounded by the same insulative boundary as the opposing first receiving volume.
3 . The micro-connector of claim 1 wherein the conductive element is a solder ball.
4 . The micro-connector of claim 1 wherein the conductive element comprises at least one stud bump.
5 . The micro-connector of claim 1 wherein the predefined low resistance is about 0.002 to about 0.05 ohms-cm.
6 . The micro-connector of claim 1 wherein the predefined high resistance is greater than about 10,000 ohms-cm.
7 . The micro-connector of claim 1 wherein the insulative region is comprised of an oxide material deposited in a chemical vapor deposition process.
8 . The micro-connector of claim 1 wherein the insulative region is comprised of an oxide material deposited in a low pressure chemical vapor deposition process.
9 . The micro-connector of claim 1 wherein the semiconductor micro-connector layer is comprised of a silicon semiconductor material
10 . The micro-connector of claim 1 wherein the semiconductor micro-connector layer is comprised of a germanium semiconductor material.
11 . The micro-connector of claim 1 wherein the low resistance region is defined using a semiconductor doping process.
12 . The micro-connector of claim 2 wherein the resistance between the mating element defined on the first surface and the complementary and opposing mating element defined on the second surface is less than about one ohm.
13 . A method for making a micro-connector comprising the steps of:
providing a semiconductor micro-connector layer comprising a thickness, a first surface and a second surface and having a predefined electrical conductivity,
defining an isolation trench on the first surface having a predetermined depth,
filling the isolation trench with a dielectric material,
removing a predetermined portion of the second surface to expose the dielectric material to define an insulative boundary encompassing a low resistance region,
removing a predetermined portion of the first surface to expose a portion of the dielectric material and to define a receiving volume and a mating element in a first etching process, and,
removing the exposed portion of the dielectric material in a second etching process.
14 . A micro-connector made from a process comprising the steps of:
providing a semiconductor micro-connector layer comprising a thickness, a first surface and a second surface and having a predefined electrical conductivity,
defining an isolation trench on the first surface having a predetermined depth,
filling the isolation trench with a dielectric material,
removing a predetermined portion of the second surface to expose the dielectric material to define an insulative boundary encompassing a low resistance region,
removing a predetermined portion of the first surface to expose a portion of the dielectric material and to define a receiving volume and a mating element in a first etching process, and,
removing the exposed portion of the dielectric material in a second etching process.