Circuits and methods for providing communication between a memory card and a host device

1. An interface circuit for providing communication between a memory card and a host device, comprising:

a first plurality of pins connected to the interface circuit;

a second plurality of pins connected to the interface circuit; and

a control unit, coupled to the first and second pluralities of pins, that enables the first plurality of pins and disables the second plurality of pins when transferring a first plurality of signals between the host device and the memory card in a first mode via the first plurality of pins, and that disables the first plurality of pins and enables the second plurality of pins when transferring a second plurality of signals between the host device and the memory card in a second mode via the second plurality of pins,

wherein the control unit transfers a clock signal of the second plurality of signals by differential signaling in the second mode via a clock pin of the second plurality of pins, and wherein a signal transfer in the second mode is at a greater speed than a signal transfer in the first mode.

2. The interface circuit of claim 1 , wherein a first pin in the first plurality of pins is coupled to the clock pin via a node, wherein the interface circuit transfers a first signal of the first plurality of signals between the first pin and a first communication circuit via the node in the first mode, and transfers the clock signal between the clock pin and a second communication circuit via the node in the second mode.

3. The interface circuit of claim 2 , wherein the first signal comprises a data signal, and wherein the first plurality of signals comprises a command signal indicative of the direction of transfer of the first signal.

4. The interface circuit of claim 1 , wherein the second mode comprises an ultra high speed-II mode.

5. The interface circuit of claim 1 , wherein the host device comprises a digital camcorder.

6. The interface circuit of claim 1 , wherein the memory card comprises a secure digital card.

7. The interface circuit of claim 1 , wherein the interface circuit is included in the host device.

8. The interface circuit of claim 1 , wherein the control unit further receives a selection signal indicative of a mode selected from the first mode and the second mode, and selectively enables the first plurality of pins and the second plurality of pins according to the selection signal.

9. The interface circuit of claim 8 , wherein the selection signal is determined according to a transfer mode supported by both the host device and the memory card.

10. A system comprising:

a host device;

a memory card; and

an interface circuit for providing communication between the host device and the memory card, the interface circuit comprising:

a first unit;

a second unit; and

a control unit that receives a selection signal and adjusts signal transfer speed according to the selection signal by enabling the first unit and disabling the second unit to transfer a first signal between the host device and the memory card with a first signal transfer speed via the first unit, and by disabling the first unit and enabling the second unit to transfer a clock signal between the host device and the memory card via the second unit and to transfer a second signal between the host device and the memory card with a second signal transfer speed via the second unit,

wherein the control unit transfers the clock signal by differential signaling via the second unit.

11. The system of claim 10 , wherein the first unit comprises a first pin and the second unit comprises a clock pin, wherein the first pin is coupled to the clock pin via a node, wherein the interface circuit transfers the first signal between the first pin and a first communication circuit via the node, and transfers the clock signal between the clock pin and a second communication circuit via the node.

12. The system of claim 10 , wherein the first signal and the second signal comprise data signals.

13. The system of claim 10 , wherein the second mode comprises an ultra high speed-II mode.

14. The system of claim 10 , wherein the host device comprises a digital camcorder.

15. The system of claim 10 , wherein the interface circuit is included in the host device.

16. A method for providing communication between a host device and a memory card, comprising:

enabling a first plurality of pins, disabling a second plurality of pins;

transferring a first plurality of signals via the first plurality of pins between the host device and the memory card, if a first mode is selected;

disabling the first plurality of pins;

enabling the second plurality of pins; and

transferring a second plurality of signals via the second plurality of pins between the host device and the memory card, if a second mode is selected,

wherein the transferring of the second plurality of signals comprises transferring a clock signal of the second plurality of signals via a clock pin of the second plurality of pins by differential signaling in the second mode, and wherein a signal transfer in the second mode is at a greater speed than a signal transfer in the first mode.

17. The method of claim 16 , further comprising:

receiving a selection signal indicative of a mode selected from the first mode and the second mode.

18. The method of claim 16 , wherein a first pin of the first plurality of pins is coupled to the clock pin via a node, wherein the transferring of the first plurality of signals comprises transferring a first signal of the first plurality of signals between the first pin and a first communication circuit via the node in the first mode, and wherein the transferring of the second plurality of signals comprises transferring the clock signal between the clock pin and a second communication circuit via the node in the second mode.

19. The method of claim 16 , wherein the host device comprises a digital camcorder.

20. The method of claim 16 , wherein the second mode comprises an ultra high speed-II mode.