Capacitor save energy verification
A memory subsystem includes a volatile memory, a nonvolatile memory, and a controller including logic to interface the volatile memory to an external system. The volatile memory is addressable for reading and writing by the external system. The memory subsystem includes a power controller with logic to detect when power from the external system to at least one of the volatile and nonvolatile memories and to the controller fails. When external system power fails, backup power is provided to at least one of the volatile and nonvolatile memories and to the controller for long enough to enable the controller to back up data from the volatile memory to the nonvolatile memory.
1. A memory subsystem for use in a device, comprising:
volatile memory;
nonvolatile memory; and
logic to make available to the device at least one first memory partition of the volatile memory that will be backed up to the nonvolatile memory in the event of device power failure, including unmodified areas in the first partition; and
logic to make available to the device at least one second memory partition of the volatile memory that that can be modified by the device but that will not be backed up to the nonvolatile memory and will lose any date stored therein in the event of device power failure.
2. The memory subsystem of claim 1 , further comprising:
logic to make available to the device at least one portion of the nonvolatile memory that is not reserved for backups from the volatile memory.
3. The memory subsystem of claim 1 , further comprising:
one or more configuration registers to enable the device to specify the at least one portion of the volatile memory that will be backed up to the nonvolatile memory in the event of device power failure.
4. The memory subsystem of claim 2 , further comprising:
one or more configuration registers to enable the device to specify the at least one portion of the nonvolatile memory that is not reserved for backups from the volatile memory.
5. A device comprising:
a memory subsystem comprising volatile memory, nonvolatile memory, and
logic configure at least one first memory partition of the volatile memory that will be backed up to the nonvolatile memory in the event of power failure to the device, the backup including unmodified areas in the first partition; and
logic to configure at least one second memory partition of the volatile memory that that can be written with data but that will not be backed up to the nonvolatile memory and will lose data stored therein in the event of the power failure.
6. The device of claim 5 , the memory subsystem further comprising:
logic to configure at least one portion of the nonvolatile memory that is not reserved for backups from the volatile memory.
7. The device of claim 5 , the memory subsystem further comprising:
one or more configuration registers to configure the at least one portion of the volatile memory that will be backed up to the nonvolatile memory in the event of device power failure.
8. The device of claim 6 , the memory subsystem further comprising:
one or more configuration registers to configure the at least one portion of the nonvolatile memory that is not reserved for backups from the volatile memory.
9. A method of configuring memory in a device, comprising:
configuring at least one first partition of volatile memory of a memory system of the device to be backed up to nonvolatile memory of the memory system in the event of device power failure, the backup including unmodified areas of the first partition; and
configuring at least one second partition of the volatile memory to be not backed up to the nonvolatile memory in the event of device power failure so that the memory content of the second partition, including modified content, are lost in the event of the power failure.
10. The method of claim 9 , further comprising:
configuring at least one portion of the nonvolatile memory to be not reserved for backups from the volatile memory.