IP Library Granted Patent US 8,854,139
Granted Patent B2
US 8,854,139 · App. 13/483,161 · Granted Oct 7, 2014

Regulated cascode current mirror scheme for transconductance amplifiers

Inventor: Russell Fagg (Cambridge, GB)
Assignee: Nujira Limited
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Quick Facts
Patent No.
US 8,854,139
App. No.
13/483,161
Granted
Oct 7, 2014
Kind
B2
Abstract

There is described an amplification stage comprising: a current mirror circuit comprising a reference transistor arranged to receive a current associated with an input signal and an output transistor providing a current source for an output signal line; a current sink to the output signal line, under the control of the input signal; circuitry arranged to maintain equality between the drain/collector voltages on the transistors of the current mirror circuit.

Claims (29)

1. An amplification stage comprising:

a current mirror circuit comprising a reference transistor arranged to receive a current associated with an input signal and an output transistor providing a current source for an output signal line;

an input transistor arranged to receive an input signal voltage at a control node thereof, and for providing a current sink to the output signal line;

circuitry arranged to maintain equality between the drain/collector voltages on the transistors of the current mirror circuit.

2. The amplification stage of claim 1 , wherein the circuitry arranged to maintain equality between the drain/collector voltages on the transistors of the current mirror circuit includes an additional transistor having a conductive path connected between the current source and the output signal line, and being controlled by a difference between the drain/collector voltages.

3. The amplification stage of claim 2 , further comprising a difference amplifier having inputs arranged to the drain/collector voltages of the current mirror circuit transistors, and an output connected to the control node of the additional transistor.

4. The amplification stage of claim 1 , wherein the circuitry arranged to maintain equality between the drain/collector voltages on the transistors of the current mirror circuit includes an additional transistor having a conductive path connected between a supply voltage and the current source, and being controlled by a difference between the drain/collector voltages.

5. The amplification stage of claim 4 , further comprising a difference amplifier having inputs arranged to the drain/collector voltages of the current mirror circuit transistors, and an output connected to the control node of the additional transistor.

6. The amplification stage of claim 1 , comprising a further input transistor arranged to receive the input signal voltage at a control node thereof and for providing the current associated with the input signal.

7. A transconductance amplifier including an amplification stage according to claim 1 .

8. An envelope tracking power supply for a radio frequency power amplifier including amplification stage according to claim 1 .

9. A handset of a mobile communication system including an amplification stage according to claim 1 .

10. An infrastructure element of a mobile communication system including an amplification stage according to claim 1 .

11. An amplification stage comprising:

a current mirror circuit comprising a reference transistor arranged to receive a current associated with an input signal and an output transistor providing a current source for an output signal line;

a capacitor having one terminal connected to the drain/collector of the output transistor of the current mirror and one terminal connected to a supply voltage; and

circuitry arranged to maintain equality between the drain/collector voltages on the transistors of the current mirror circuit.

12. An amplification stage comprising:

a current mirror circuit comprising a reference transistor arranged to receive a reference current and an output transistor providing a current source for an output signal line;

a first input transistor arranged to receive an input signal, and provide the reference current to the reference transistor of the current mirror;

a second input transistor arranged to receive the input signal, and provide a current sink for the output signal line;

a difference amplifier arranged to amplify the difference between the drain/collector voltages of the reference and output transistors of the current mirror; and

an additional transistor connected in the current source path between a supply voltage and the output signal line, and arranged to receive the output of the difference amplifier at its control node, for maintaining equality between the drain/collector voltages on the transistors of the current mirror circuit.

13. The amplification stage of claim 12 , wherein the additional transistor is connected between the supply voltage and source/emitter of the output transistor of the current mirror.

14. The amplification stage of claim 12 , wherein the additional transistor is connected between the drain/collector of the output transistor of the current mirror and the output signal line.

15. The amplification stage of claim 12 further comprising a capacitor having one terminal connected to the drain/collector of the output transistor of the current mirror and one terminal connected to the first supply voltage.

16. The amplification stage of claim 12 further comprising an input stage for providing the input signal.

17. An envelope tracking power supply for an RF amplifier including a transconductance amplifier having an amplification stage according to claim 12 .

18. A mobile communication system including an amplification stage according to claim 12 .

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 22, 2015
From: NUJIRA LIMITED
To: SNAPTRACK, INC.
Reel/Frame 036001/0933 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 10, 2012
From: FAGG, RUSSELL
To: NUJIRA LIMITED
Reel/Frame 028763/0720 →
Continuity (1)
Related Publication 20130321081A1 · Dec 5, 2013