IP Library Granted Patent US 8,865,529
Granted Patent B2
US 8,865,529 · App. 13/495,149 · Granted Oct 21, 2014

Thin-film transistor device manufacturing method, thin-film transistor device, and display device

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Quick Facts
Patent No.
US 8,865,529
App. No.
13/495,149
Granted
Oct 21, 2014
Kind
B2
Abstract

A thin-film transistor device manufacturing method and others according to the present disclosure includes: forming a plurality of gate electrodes above a substrate; forming a gate insulating layer on the plurality of gate electrodes; forming an amorphous silicon layer on the gate insulating layer; forming a buffer layer and a light absorbing layer above the amorphous silicon layer; forming a crystalline silicon layer by crystallizing the amorphous silicon layer with heat generated by heating the light absorbing layer using a red or near infrared laser beam; and forming a source electrode and a drain electrode on the crystalline silicon layer in a region that corresponds to each of the plurality of gate electrodes, and film thicknesses of the gate insulating layer, the amorphous silicon layer, the buffer layer, and the light absorbing layer satisfy predetermined expressions.

Claims (37)

1. A thin-film transistor device manufacturing method comprising:

preparing a substrate;

forming a plurality of gate electrodes above the substrate;

forming a gate insulating layer on the plurality of gate electrodes;

forming an amorphous silicon layer on the gate insulating layer;

forming a buffer layer on the amorphous silicon layer;

forming a light absorbing layer on the buffer layer;

forming a crystalline silicon layer by indirectly crystallizing the amorphous silicon layer with heat generated by heating the light absorbing layer using a laser beam emitted from a predetermined laser and having a wavelength greater than or equal to 600 nm while moving the predetermined laser in a given direction relative to the substrate; and

forming a source electrode and a drain electrode on the crystalline silicon layer in a region that corresponds to each of the plurality of gate electrodes,

wherein a film thickness of the gate insulating layer, a film thickness of the amorphous silicon layer, a film thickness of the buffer layer, and a film thickness of the light absorbing layer satisfy X and Y that are in a range defined by Expressions 1 to 4:

Y≦− 1.06 X− 0.22 ΔA′+ 1.07;  Expression 1:

Y≧ 1.29 X+ 1.61*Δ A′+ 1.44;  Expression 2:

Y≧ 1.06 X+ 0.33Δ A′+ 0.89; and  Expression 3:

Y≦ 1.29 X+− 0.97*Δ A′− 0.95,  Expression 4:

where X is a value obtained by dividing an optical film thickness of the light absorbing layer by the wavelength of the laser beam, the optical film thickness of the light absorbing layer being a result of multiplying the film thickness of the light absorbing layer by a refractive index of the light absorbing layer,

Y is a value obtained by dividing a sum of an optical film thickness of the buffer layer, an optical thickness of the amorphous silicon layer, and an optical film thickness of the gate insulating layer by the wavelength of the laser beam, the optical film thickness of the buffer layer being a result of multiplying a thickness of the buffer layer by a refractive index of the buffer layer, the optical film thickness of the amorphous silicon layer being a result of multiplying a film thickness of the amorphous silicon layer by the refractive index of the amorphous silicon layer, and the optical film thickness of the gate insulating layer being a result of multiplying a film thickness of the gate insulating layer by a refractive index of the gate insulating layer, and

ΔA′ is a value calculated according to an expression (AG/dG)×(ρ×c)/(ρG×cG), where ρ and c are a density and a specific heat of the light absorbing layer, respectively, dG, ρG, and cG are a film thickness, a density, and a specific heat of the gate electrode, respectively, and AG is a maximum absorptance of the gate electrode when the light absorbing layer located above the gate electrode and the light absorbing layer not located above the gate electrode have an equal light absorptance for the laser beam.

2. The thin-film transistor device manufacturing method according to claim 1 ,

wherein the light absorbing layer is translucent to a predetermined wavelength range of the laser beam, where an extinction coefficient k<1.

3. The thin-film transistor device manufacturing method according to claim 1 , further comprising

removing at least the light absorbing layer after forming the crystalline silicon layer and before forming the source electrode and the drain electrode.

4. The thin-film transistor device manufacturing method according to claim 1 , further comprising

removing the buffer layer and the light absorbing layer after forming the crystalline silicon layer and before forming the source electrode and the drain electrode.

5. The thin-film transistor device manufacturing method according to claim 1 ,

wherein, when forming the light absorbing layer, the predetermined laser emits the laser beam in an oscillation mode that is a continuous wave mode or a quasi-continuous wave mode.

6. The thin-film transistor device manufacturing method according to claim 1 ,

wherein the predetermined laser is included in a solid-state laser device.

7. The thin-film transistor device manufacturing method according to claim 1 ,

wherein the predetermined laser is included in a laser device that uses a semiconductor laser element.

8. The thin-film transistor device manufacturing method according to claim 1 ,

wherein, when forming the light absorbing layer, a variation in irradiation energy density of the laser beam on the amorphous silicon layer is approximately less than 5%.

9. The thin-film transistor device manufacturing method according to claim 1 ,

wherein the wavelength of the predetermined laser has a wavelength from 600 nm to 2000 nm.

10. The thin-film transistor device manufacturing method according to claim 1 ,

wherein the gate electrode forming includes:

forming an undercoat layer made of silicon oxide on the substrate; and

forming the plurality of gate electrodes on the undercoat layer.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 12, 2015
From: PANASONIC CORPORATION
To: JOLED INC
Reel/Frame 035187/0483 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 3, 2012
From: SUGAWARA, YUTA
To: PANASONIC CORPORATION
Reel/Frame 028714/0650 →