IP Library Granted Patent US 8,633,107
Granted Patent B2
US 8,633,107 · App. 13/499,899 · Granted Jan 21, 2014

Method of producing a semiconductor device and semiconductor device having a through-wafer interconnect

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Quick Facts
Patent No.
US 8,633,107
App. No.
13/499,899
Granted
Jan 21, 2014
Kind
B2
Abstract

A substrate ( 1 ) of semiconductor material is provided with a contact pad ( 7 ). An opening ( 9 ) is formed through the semiconductor material from an upper surface to the contact pad, the opening forming an edge ( 18 ) at or near the upper surface. A dielectric layer ( 10 ) is applied on the semiconductor material in the opening. A metallization ( 11 ) is applied, which contacts the contact pad and is separated from the substrate by the dielectric layer. A top-metal ( 12 ) is applied, which contacts the metallization at or near the edge. A protection layer ( 13 ) is applied, which covers the top-metal and/or the metallization at least at or near the edge, and a passivation ( 15 ) is applied.

Claims (15)

1. A method of producing a semiconductor device, comprising:

providing a substrate of semiconductor material with a contact pad, the substrate having an upper surface and the contact pad being arranged opposite to the upper surface;

forming an opening through the semiconductor material from the upper surface to the contact pad, the opening forming an edge of the substrate at or near the upper surface;

applying a dielectric layer on the semiconductor material in the opening;

applying a metallization, wherein the metallization contacts the contact pad and is separated from the semiconductor material by the dielectric layer;

applying a top-metal on the upper surface and over the edge, the top-metal contacting the metallization;

applying a protection layer, wherein the protection layer is selected from the group consisting of an oxide, a nitride of the semiconductor material, an oxinitride of the semiconductor material, and a polyimide, and wherein the protection layer covers the top-metal and the metallization at least at or near the edge;

structuring the top-metal and the protection layer together by a photolithography step; and

applying a passivation.

2. The method of claim 1 , wherein the protection layer is an oxide of the semiconductor material.

3. The method of claim 1 , wherein the protection layer is a nitride or an oxinitride of the semiconductor material.

4. The method of claim 1 , wherein the protection layer is a polyimide.

5. The method according to claim 1 , wherein the protection layer is applied so that it has a thickness between 0.01 μm and 0.5 μm.

6. The method according to claim 1 , further comprising:

forming the passivation with at least two layers of different materials.

Assignments (2)
CHANGE OF NAME Recorded Apr 16, 2013
From: AUSTRIAMICROSYSTEMS AG
To: AMS AG
Reel/Frame 030228/0326 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 27, 2012
From: KRAFT, JOCHEN; TEVA, JORDI
To: AUSTRIAMICROSYSTEMS AG
Reel/Frame 028657/0898 →