IP Library Granted Patent US 8,843,937
Granted Patent B2
US 8,843,937 · App. 13/502,460 · Granted Sep 23, 2014

Electronic control unit having a real-time core managing partitioning

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Quick Facts
Patent No.
US 8,843,937
App. No.
13/502,460
Granted
Sep 23, 2014
Kind
B2
Abstract

An electronic control unit having a microcontroller provided with RAM associated with variable data and ROM associated with the code of a software operating system incorporating a real time core for executing computer tasks. The RAM and ROM include zones corresponding to partitions, one of which is allocated to the real time core, while each of the others is allocated to at least one of the tasks. The RAM and the ROM are associated with an address bus that is physically programmed so that each partition is prevented firstly from writing in another one of the zones of the RAM, and secondly from executing another one of the zones of the ROM. The real time core is associated with a timer for allocating an execution time to each partition.

Claims (13)

1. An electronic control unit comprising a microcontroller having ROM containing code of a software operating system incorporating a real-time core for executing computer tasks, and RAM containing variable data relating to the real-time core and the tasks, the RAM and ROM including zones corresponding to partitions, one of which is allocated to the real-time core, while each of the others is allocated to at least one of the tasks, the ROM and the RAM being associated with an address bus that is physically programmed to prevent each partition firstly from writing in another one of the zones of the RAM, and secondly from executing another one of the zones of the ROM, and the real-time core is associated with a timer for allocating an execution time to each partition, wherein the partition allocated to the real-time core contains a list of tasks ready to be executed and organized by partition, and the real-time core is arranged to manage a partition pointer for accessing the list of ready tasks and the list of ready tasks is in the form of a chaining head that contains the context addresses of the first and last tasks that are ready to be executed.

2. The unit according to claim 1 , wherein the real-time core is arranged to cause the partitions to be executed in an execution cycle that is circular.

3. The unit according to claim 2 , wherein the execution cycle includes a given partition several times over.

4. The unit according to claim 2 , wherein the execution cycle includes a time reserve interval.

5. The unit according to claim 1 , wherein the partition allocated to the real-time core contains memory pages each of which is allocated to a task in order to contain the registers of each task, the real-time core being arranged to manage a task pointer for containing the address of the page of the task that is being executed.

6. The unit according to claim 1 , wherein the control unit is a microcircuit including a set of instructions for a microcontroller and for peripherals of such a microcontroller.

7. The unit according to claim 1 , wherein the microcontroller is a programmable logic array.

8. An electronic control unit comprising a microcontroller having ROM containing code of a software operating system incorporating a real-time core for executing computer tasks, and RAM containing variable data relating to the real-time core and the tasks, the RAM and ROM including zones corresponding to partitions, one of which is allocated to the real-time core, while each of the others is allocated to at least one of the tasks, the ROM and the RAM being associated with an address bus that is physically programmed to prevent each partition firstly from writing in another one of the zones of the RAM, and secondly from executing another one of the zones of the ROM, and the real-time core is associated with a timer for allocating an execution time to each partition, the electronic control unit being arranged so that only two partitions may be executed at a given instant and the microcontroller being arranged to manage only four buffers for said two partitions:

a buffer for the code and a buffer for the data of the partition allocated to the real-time core; and

a buffer for the code and a buffer for the data of the partition allocated to the task that is active at said instant.

9. The unit according to claim 8 , wherein the real-time core is arranged to cause the partitions to be executed in an execution cycle that is circular.

10. The unit according to claim 9 , wherein the execution cycle includes a given partition several times over.

11. The unit according to claim 9 , wherein the execution cycle includes a time reserve interval.

Assignments (2)
CHANGE OF NAME Recorded May 6, 2018
From: SAGEM DÉFENSE SÉCURITÉ
To: SAFRAN ELECTRONICS & DEFENSE
Reel/Frame 046082/0606 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 17, 2012
From: RENAULT, GUY
To: SAGEM DEFENSE SECURITE
Reel/Frame 028061/0164 →