Nonvolatile memory element having a variable resistance layer whose resistance value changes according to an applied electric signal

1. A nonvolatile memory element comprising:

a lower line formed above a substrate;

a first electrode formed on said lower line;

an interlayer insulating layer formed on said first electrode and provided with a memory cell hole that reaches a portion of said first electrode;

a barrier layer formed in a recessed shape to cover a bottom surface and at least a portion of a side wall inside said memory cell hole and connected to said first electrode, said barrier layer being a semiconductor layer or an insulating layer;

a second electrode formed inside said memory cell hole and connected to both a portion of said barrier layer formed on the side wall and a portion of said barrier layer formed on the bottom surface;

a variable resistance layer formed on said second electrode and having a stacked structure including a first oxide layer and a second oxide layer having an oxygen content atomic percentage that is higher than an oxygen content atomic percentage of said first oxide layer; and

a third electrode formed on said interlayer insulating layer and connected to said variable resistance layer,

wherein a resistance state of said variable resistance layer changes to a different resistance state based on an electric signal applied between said second electrode and said third electrode,

said barrier layer forms a Schottky barrier junction with at least one of said first electrode and said second electrode, and

said first electrode is formed lower than a bottom plane of said memory cell hole and on an entire top surface of said lower line.

2. The nonvolatile memory element according to claim 1 ,

wherein said variable resistance layer comprises tantalum oxide or hafnium oxide.

3. The nonvolatile memory element according to claim 1 ,

wherein at least a portion of said variable resistance layer is formed inside said memory cell hole.

4. The nonvolatile memory element according to claim 3 ,

wherein said first oxide layer is formed inside said memory cell hole.

5. The nonvolatile memory element according to claim 4 ,

wherein said second oxide layer is formed outside said memory cell hole.

6. The nonvolatile memory element according to claim 1 ,

wherein said first oxide layer comprises tantalum oxide having a composition expressed as TaOx (where 0.8≦x≦1.9), and

said second oxide layer comprises tantalum oxide having a composition expressed as TaOy (where 2.1≦y).

7. The nonvolatile memory element according to claim 1 ,

wherein the semiconductor layer is a silicon nitride layer.

8. The nonvolatile memory element according to claim 1 ,

wherein said second electrode comprises tantalum nitride or tungsten.

9. The nonvolatile memory element according to claim 1 ,

wherein said memory cell hole is formed penetrating through said interlayer insulating layer to inside of said first electrode.

10. The nonvolatile memory element according to claim 1 ,

wherein said third electrode is formed outside said memory cell hole.

11. A nonvolatile memory device provided with said nonvolatile memory element according to claim 1 , said nonvolatile memory device comprising:

a plurality of first electrode lines formed parallel to each other above the substrate;

a plurality of second electrode lines formed above said first electrode lines so as to (i) be parallel to each other in a plane parallel with a major surface of the substrate and (ii) three-dimensionally cross said first electrode lines; and

a plurality of said nonvolatile memory elements provided at positions which correspond to the three-dimensional crosspoints of said first electrode lines and said second electrode lines.

12. The nonvolatile memory element according to claim 1 ,

wherein said second electrode is formed in a recessed portion of said barrier layer formed in the recessed shape.