IP Library Granted Patent US 9,013,245
Granted Patent B2
US 9,013,245 · App. 13/525,715 · Granted Apr 21, 2015

Oscillators having arbitrary frequencies and related systems and methods

Inventors: Reimund Rebel (Maricopa, AZ); Klaus Juergen Schoepf (Chandler, AZ); Jan H. Kuypers (Cambridge, MA)
Assignee: Sand 9, Inc.
H03B5/30H04B1/40H03C3/095H03B5/32H03J7/065H03L7/18H03L7/197H03B19/00H03L7/0991
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Quick Facts
Patent No.
US 9,013,245
App. No.
13/525,715
Granted
Apr 21, 2015
Kind
B2
Abstract

Systems and methods for operating with oscillators configured to produce an oscillating signal having an arbitrary frequency are described. The frequency of the oscillating signal may be shifted to remove its arbitrary nature by application of multiple tuning signals or values to the oscillator. Alternatively, the arbitrary frequency may be accommodated by adjusting operation one or more components of a circuit receiving the oscillating signal.

Claims (19)

1. A method comprising:

downconverting a cellular telephone signal, the cellular telephone signal modulated with data, using an oscillating reference signal having an arbitrary frequency to generate a downconverted signal including the data; and

sampling the downconverted signal with an analog-to-digital converter (ADC) using a sampling rate selected to induce a shift of the data of the downconverted signal in a frequency domain,

wherein the arbitrary frequency differs from a standard oscillator frequency by between approximately 5,000 parts per million (ppm) and approximately 10,000 ppm.

2. The method of claim 1 , further comprising receiving, from an oscillator having a mechanical resonator, the oscillating reference signal having an arbitrary frequency.

3. The method of claim 1 , further comprising generating the oscillating reference signal from an oscillator output signal, wherein generating the oscillating reference signal comprises receiving, from an oscillator having a mechanical resonator, the oscillator output signal at a frequency synthesizer and synthesizing the oscillating reference signal, wherein the oscillating reference signal differs in frequency from a frequency of the oscillator output signal.

4. The method of claim 3 , wherein the frequency synthesizer is a phase-locked loop (PLL).

5. The method of claim 1 , further comprising receiving a value of the arbitrary frequency separate from the oscillating reference signal and selecting the sampling rate of the ADC in response to receiving the value.

6. A method comprising:

downconverting a first signal, the first signal modulated with data, using an oscillating reference signal having an arbitrary frequency to generate a downconverted signal including the data;

sampling the downconverted signal with an analog-to-digital converter (ADC) to produce a digital signal including digital data corresponding to the data; and

shifting, using a digital signal processor (DSP), the digital data in a frequency domain,

wherein the arbitrary frequency differs from a standard oscillator frequency by between approximately 500 parts per million (ppm) and 2,000 ppm, and wherein sampling the downconverted signal with an ADC comprises using a sampling rate corresponding to the standard oscillator frequency.

7. The method of claim 6 , further comprising receiving the first signal modulated with data.

8. The method of claim 6 , further comprising receiving, from an oscillator having a mechanical resonator, the oscillating reference signal having an arbitrary frequency.

9. The method of claim 6 , further comprising generating the oscillating reference signal from an oscillator output signal.

10. The method of claim 9 , wherein generating the oscillating reference signal comprises receiving, from an oscillator having a mechanical resonator, the oscillator output signal at a frequency synthesizer and synthesizing the oscillating reference signal, wherein the oscillating reference signal differs in frequency from a frequency of the oscillator output signal.

11. The method of claim 10 , wherein the frequency synthesizer is a phase-locked loop (PLL).

12. The method of claim 6 , wherein the first signal is a cellular telephone signal.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 4, 2015
From: SAND 9, INC.
To: ANALOG DEVICES, INC.
Reel/Frame 036274/0273 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 29, 2012
From: REBEL, REIMUND; SCHOEPF, KLAUS JUERGEN; KUYPERS, JAN H.
To: SAND 9, INC.
Reel/Frame 029545/0043 →
Continuity (3)
Continuation 12721472 · Mar 10, 2010
Provisional Application 61289984 · Dec 23, 2009
Related Publication 20120315866A1 · Dec 13, 2012