Usage aware NUMA process scheduling
View Patent ↗Processes may be assigned to specific processors when memory objects consumed by the processes are located in memory banks closely associated with the processors. When assigning processes to threads operating in a multiple processor NUMA architecture system, an analysis of the memory objects accessed by a process may identify processor or group of processors that may minimize the memory access time of the process. The selection may take into account the connections between memory banks and processors to identify the shortest communication path between the memory objects and the process. The processes may be pre-identified as functional processes that make little or no changes to memory objects other than information passed to or from the processes.
1. A system comprising:
a plurality of processors, each of said processors belonging to one of a plurality of processor groups;
a plurality of memory banks, each of said memory banks being assigned to one of said processor groups;
said plurality of processors and said plurality of memory banks being comprised in a single device, each of said plurality of processor groups having communication access to each of said plurality of memory banks;
an analysis engine that:
receives executable code;
identifies a functional block within said executable code by determining that said functional block has defined input and output memory objects and changes no other memory objects during execution; and
transmits said functional block as said first process to said process scheduler; and
a process scheduler that:
receives a first process comprising instructions that operate on a first memory object;
determines a first memory bank for containing said first memory object;
selects a first processor being contained in a first processor group, said first processor group corresponding to said first memory bank; and
executes said first process on said first processor.
2. The system of claim 1 , said first process being identified as said functional process by a compiler.
3. The system of claim 2 , said compiler being a just in time compiler.
4. The system of claim 1 further comprising:
an operating system;
an execution environment within said operating system, said execution environment comprising memory management functions for executing code, said process scheduler operating within said execution environment.
5. The system of claim 1 , said process scheduler being an operating system level function.