Allocating heaps in NUMA systems
View Patent ↗Processes may be assigned heap memory within locally accessible memory banks in a multiple processor NUMA architecture system. A process scheduler may deploy a process on a specific processor and may assign the process heap memory from a memory bank associated with the selected processor. The process may be a functional process that may not change state of other memory objects, other than the input or output memory objects defined in the functional process.
1. A method comprising:
operating a computer system comprising a plurality of processor groups and a plurality of memory banks, each of said processor groups having a corresponding one of said memory banks;
while operating said computer system, receiving a first process comprising instructions that operate on a first memory object;
selecting a first processor being contained in a first processor group, said first processor group corresponding to a first memory bank;
allocating first heap memory to said first process from said first memory bank; and
executing said first process on said first processor using said first heap memory.
2. The method of claim 1 , said first process being a portion of an application, said application further comprising a second process.
3. The method of claim 2 further comprising:
selecting a second processor being contained in a second processor group, said second processor group corresponding to a second memory bank;
allocating second heap memory to said second process from said second memory bank; and
executing said second process on said second processor using said second heap memory.
4. The method of claim 3 , said first process being a functional block of executable code.
5. The method of claim 4 further comprising:
determining that said first process is a functional block of code.
6. The method of claim 5 , said functional block of code being determined by analyzing metadata associated with said first process.
7. The method of claim 5 , said first process being identified as a functional process by static analysis of said first process.
8. The method of claim 7 , said static analysis identifying a set of input data, a set of output data, and a set of state change data, said set of state change data being smaller than said set of input data.
9. The method of claim 8 , said set of state change data being smaller than a sum of said set of input data and said set of output data.
10. The method of claim 4 , said first process being defined using a functional language.
11. The method of claim 10 , said functional language being one of a group composed of:
Erlang;
Scala;
F#;
Lisp;
Clojure;
OCaml; and
Haskell.
12. The method of claim 1 , said selecting said first processor being performed in part by:
determining that said first processor has a processing bandwidth capable of performing said first process.
13. The method of claim 12 further comprising:
analyzing a second processor corresponding to a second memory bank; and
determining that said second processor does not have processing bandwidth capable of performing said first process and not selecting said second processor for performing said first process.
14. A system comprising:
a plurality of processors, each of said processors belonging to one of a plurality of processor groups;
a plurality of memory banks, each of said memory banks being assigned to one of said processor groups;
a process scheduler that:
receives a first process comprising instructions that operate on a first memory object;
selects a first processor being contained in a first processor group, said first processor group corresponding to said first memory bank;
allocates heap memory for said first process within said first memory bank; and
executes said first process on said first processor.
15. The system of claim 14 further comprising:
an operating system;
an execution environment within said operating system, said execution environment comprising memory management functions for executing code, said process scheduler operating within said execution environment.
16. The system of claim 15 , said process scheduler being an operating system level function.
17. The system of claim 16 , said first process being a portion of an application, said application further comprising a second process.
18. The system of claim 17 , said process scheduler that further:
selects a second processor being contained in a second processor group, said second processor group corresponding to a second memory bank;
allocates second heap memory to said second process from said second memory bank; and
executes said second process on said second processor using said second heap memory.